Searched refs:fscr (Results 1 – 8 of 8) sorted by relevance
62 u64 fscr; in init_FSCR() local64 fscr = mfspr(SPRN_FSCR); in init_FSCR()65 fscr |= FSCR_TAR|FSCR_EBB; in init_FSCR()66 mtspr(SPRN_FSCR, fscr); in init_FSCR()71 u64 fscr; in init_FSCR_power9() local73 fscr = mfspr(SPRN_FSCR); in init_FSCR_power9()74 fscr |= FSCR_SCV; in init_FSCR_power9()75 mtspr(SPRN_FSCR, fscr); in init_FSCR_power9()81 u64 fscr; in init_FSCR_power10() local83 fscr = mfspr(SPRN_FSCR); in init_FSCR_power10()[all …]
1811 current->thread.fscr |= FSCR_DSCR; in DEFINE_INTERRUPT_HANDLER()1812 mtspr(SPRN_FSCR, current->thread.fscr); in DEFINE_INTERRUPT_HANDLER()
96 if ((msr & MSR_PR) && !(vcpu->arch.fscr & FSCR_EBB)) { in kvmhv_p9_tm_emulation()98 vcpu->arch.fscr &= ~FSCR_INTR_CAUSE; in kvmhv_p9_tm_emulation()99 vcpu->arch.fscr |= (u64)FSCR_EBB_LG << 56; in kvmhv_p9_tm_emulation()149 vcpu->arch.fscr &= ~FSCR_INTR_CAUSE; in kvmhv_p9_tm_emulation()150 vcpu->arch.fscr |= (u64)FSCR_TM_LG << 56; in kvmhv_p9_tm_emulation()181 vcpu->arch.fscr &= ~FSCR_INTR_CAUSE; in kvmhv_p9_tm_emulation()182 vcpu->arch.fscr |= (u64)FSCR_TM_LG << 56; in kvmhv_p9_tm_emulation()221 vcpu->arch.fscr &= ~FSCR_INTR_CAUSE; in kvmhv_p9_tm_emulation()222 vcpu->arch.fscr |= (u64)FSCR_TM_LG << 56; in kvmhv_p9_tm_emulation()
40 if (current->thread.fscr != vcpu->arch.fscr) in load_spr_state()41 mtspr(SPRN_FSCR, vcpu->arch.fscr); in load_spr_state()78 vcpu->arch.fscr = mfspr(SPRN_FSCR); in store_spr_state()177 if (current->thread.fscr != vcpu->arch.fscr) in restore_p9_host_os_sprs()178 mtspr(SPRN_FSCR, current->thread.fscr); in restore_p9_host_os_sprs()
106 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(fscr, 64, KVMPPC_GSID_FSCR)
948 *spr_val = vcpu->arch.fscr; in kvmppc_core_emulate_mfspr_pr()
144 If the FSCR bit is set, then the fscr-bit-nr property will exist and161 - fscr-bit-nr243 fscr-bit-nr = <xx>;
234 unsigned long fscr; member