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/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_gmc.h117 uint32_t (*get_invalidate_req)(unsigned int vmid, uint32_t flush_type);
156 uint32_t vmhub, uint32_t flush_type);
159 uint32_t flush_type, bool all_hub,
446 uint32_t vmhub, uint32_t flush_type);
448 uint32_t flush_type, bool all_hub,
H A Dgmc_v12_0.c214 unsigned int vmhub, uint32_t flush_type) in gmc_v12_0_flush_vm_hub() argument
218 u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid, flush_type); in gmc_v12_0_flush_vm_hub()
301 * @flush_type: the flush type
306 uint32_t vmhub, uint32_t flush_type) in gmc_v12_0_flush_gpu_tlb() argument
321 u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid, flush_type); in gmc_v12_0_flush_gpu_tlb()
339 * @flush_type: the flush type
346 uint16_t pasid, uint32_t flush_type, in gmc_v12_0_flush_gpu_tlb_pasid() argument
356 input.flush_type = flush_type; in gmc_v12_0_flush_gpu_tlb_pasid()
380 flush_type); in gmc_v12_0_flush_gpu_tlb_pasid()
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H A Dgmc_v11_0.c216 * @flush_type: the flush type
221 uint32_t vmhub, uint32_t flush_type) in gmc_v11_0_flush_gpu_tlb() argument
225 u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid, flush_type); in gmc_v11_0_flush_gpu_tlb()
318 * @flush_type: the flush type
325 uint16_t pasid, uint32_t flush_type, in gmc_v11_0_flush_gpu_tlb_pasid() argument
343 flush_type); in gmc_v11_0_flush_gpu_tlb_pasid()
346 flush_type); in gmc_v11_0_flush_gpu_tlb_pasid()
H A Dgmc_v10_0.c231 * @flush_type: the flush type
236 uint32_t vmhub, uint32_t flush_type) in gmc_v10_0_flush_gpu_tlb() argument
240 u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid, flush_type); in gmc_v10_0_flush_gpu_tlb()
326 * @flush_type: the flush type
333 uint16_t pasid, uint32_t flush_type, in gmc_v10_0_flush_gpu_tlb_pasid() argument
351 flush_type); in gmc_v10_0_flush_gpu_tlb_pasid()
354 flush_type); in gmc_v10_0_flush_gpu_tlb_pasid()
H A Damdgpu_gmc.c721 uint32_t vmhub, uint32_t flush_type) in amdgpu_gmc_flush_gpu_tlb()
745 if (adev->gmc.flush_tlb_needs_extra_type_0 && flush_type == 2) in amdgpu_gmc_flush_gpu_tlb()
750 flush_type); in amdgpu_gmc_flush_gpu_tlb()
786 uint32_t flush_type, bool all_hub, in amdgpu_gmc_flush_gpu_tlb_pasid()
814 if (adev->gmc.flush_tlb_needs_extra_type_0 && flush_type == 2) in amdgpu_gmc_flush_gpu_tlb_pasid()
820 flush_type, all_hub, in amdgpu_gmc_flush_gpu_tlb_pasid()
842 if (flush_type == 2 && adev->gmc.flush_tlb_needs_extra_type_0) in amdgpu_gmc_flush_gpu_tlb_pasid()
845 kiq->pmf->kiq_invalidate_tlbs(ring, pasid, flush_type, all_hub); in amdgpu_gmc_flush_gpu_tlb_pasid()
712 amdgpu_gmc_flush_gpu_tlb(struct amdgpu_device * adev,uint32_t vmid,uint32_t vmhub,uint32_t flush_type) amdgpu_gmc_flush_gpu_tlb() argument
775 amdgpu_gmc_flush_gpu_tlb_pasid(struct amdgpu_device * adev,uint16_t pasid,uint32_t flush_type,bool all_hub,uint32_t inst) amdgpu_gmc_flush_gpu_tlb_pasid() argument
H A Dgmc_v9_0.c708 uint32_t flush_type) in gmc_v9_0_get_invalidate_req() argument
714 req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, flush_type); in gmc_v9_0_get_invalidate_req()
772 * @flush_type: the flush type
777 uint32_t vmhub, uint32_t flush_type) in gmc_v9_0_flush_gpu_tlb() argument
787 inv_req = gmc_v9_0_get_invalidate_req(vmid, flush_type); in gmc_v9_0_flush_gpu_tlb()
886 * @flush_type: the flush type
893 uint16_t pasid, uint32_t flush_type, in gmc_v9_0_flush_gpu_tlb_pasid() argument
911 flush_type); in gmc_v9_0_flush_gpu_tlb_pasid()
915 flush_type); in gmc_v9_0_flush_gpu_tlb_pasid()
H A Dgfxhub_v3_0_3.c58 uint32_t flush_type) in gfxhub_v3_0_3_get_invalidate_req() argument
65 req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, flush_type); in gfxhub_v3_0_3_get_invalidate_req()
H A Dgfxhub_v2_0.c56 uint32_t flush_type) in gfxhub_v2_0_get_invalidate_req() argument
63 req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, flush_type); in gfxhub_v2_0_get_invalidate_req()
H A Dmmhub_v3_0_2.c76 uint32_t flush_type) in mmhub_v3_0_2_get_invalidate_req() argument
83 req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, flush_type); in mmhub_v3_0_2_get_invalidate_req()
H A Dgfxhub_v12_0.c62 uint32_t flush_type) in gfxhub_v12_0_get_invalidate_req() argument
69 req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, flush_type); in gfxhub_v12_0_get_invalidate_req()
H A Dgfxhub_v3_0.c55 uint32_t flush_type) in gfxhub_v3_0_get_invalidate_req() argument
62 req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, flush_type); in gfxhub_v3_0_get_invalidate_req()
H A Dgfxhub_v11_5_0.c60 uint32_t flush_type) in gfxhub_v11_5_0_get_invalidate_req() argument
67 req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, flush_type); in gfxhub_v11_5_0_get_invalidate_req()
H A Dmmhub_v3_0_1.c83 uint32_t flush_type) in mmhub_v3_0_1_get_invalidate_req() argument
90 req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, flush_type); in mmhub_v3_0_1_get_invalidate_req()
H A Dmmhub_v3_0.c76 uint32_t flush_type) in mmhub_v3_0_get_invalidate_req() argument
83 req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, flush_type); in mmhub_v3_0_get_invalidate_req()
H A Dmmhub_v2_0.c120 uint32_t flush_type) in mmhub_v2_0_get_invalidate_req() argument
127 req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, flush_type); in mmhub_v2_0_get_invalidate_req()
H A Dmmhub_v2_3.c59 uint32_t flush_type) in mmhub_v2_3_get_invalidate_req() argument
66 req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, flush_type); in mmhub_v2_3_get_invalidate_req()
H A Dgfxhub_v2_1.c59 uint32_t flush_type) in gfxhub_v2_1_get_invalidate_req() argument
66 req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, flush_type); in gfxhub_v2_1_get_invalidate_req()
H A Dgfxhub_v12_1.c668 uint32_t flush_type) in gfxhub_v12_1_get_invalidate_req() argument
676 FLUSH_TYPE, flush_type); in gfxhub_v12_1_get_invalidate_req()
H A Dgmc_v7_0.c422 * @flush_type: type of flush
429 uint16_t pasid, uint32_t flush_type,
460 * @flush_type: type of flush
465 uint32_t vmhub, uint32_t flush_type)
435 gmc_v7_0_flush_gpu_tlb_pasid(struct amdgpu_device * adev,uint16_t pasid,uint32_t flush_type,bool all_hub,uint32_t inst) gmc_v7_0_flush_gpu_tlb_pasid() argument
471 gmc_v7_0_flush_gpu_tlb(struct amdgpu_device * adev,uint32_t vmid,uint32_t vmhub,uint32_t flush_type) gmc_v7_0_flush_gpu_tlb() argument
H A Damdgpu_vm.h528 uint32_t flush_type,
H A Dmmhub_v4_1_0.c68 uint32_t flush_type) in mmhub_v4_1_0_get_invalidate_req() argument
/linux/drivers/media/platform/qcom/iris/
H A Diris_hfi_gen1_command.c193 u32 flush_type = 0; in iris_hfi_gen1_session_stop() local
199 flush_type = HFI_FLUSH_ALL; in iris_hfi_gen1_session_stop()
201 flush_type = HFI_FLUSH_OUTPUT; in iris_hfi_gen1_session_stop()
208 flush_pkt.flush_type = flush_type; in iris_hfi_gen1_session_stop()
/linux/crypto/
H A Dtestmgr.c217 enum flush_type {
263 * @flush_type: for hashes, whether an update() should be done now vs.
271 enum flush_type flush_type;
430 .flush_type = FLUSH_TYPE_FLUSH,
460 .flush_type = FLUSH_TYPE_REIMPORT,
463 .flush_type = FLUSH_TYPE_REIMPORT,
496 if (divs[i].flush_type != FLUSH_TYPE_NONE) in valid_sg_divisions()
1042 div->flush_type = FLUSH_TYPE_NONE; in generate_random_sgl_divisions()
1046 div->flush_type in generate_random_sgl_divisions()
218 enum flush_type { global() enum
272 enum flush_type flush_type; global() member
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/linux/drivers/media/platform/qcom/venus/
H A Dhfi_msgs.h148 u32 flush_type; member
H A Dhfi_cmds.h206 u32 flush_type; member

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