Searched refs:flip_immediate (Results 1 – 12 of 12) sorted by relevance
299 bool flip_immediate) in dcn20_set_flip_control_gsl() argument303 pipe_ctx->plane_res.hubp, flip_immediate); in dcn20_set_flip_control_gsl()1397 bool flip_immediate = false; in dcn20_pipe_control_lock() local1406 flip_immediate = pipe->plane_state->flip_immediate; in dcn20_pipe_control_lock()1410 while (!flip_immediate && temp_pipe) { in dcn20_pipe_control_lock()1412 flip_immediate = temp_pipe->plane_state->flip_immediate; in dcn20_pipe_control_lock()1417 if (flip_immediate && lock) { in dcn20_pipe_control_lock()1424 if (temp_pipe->plane_state && temp_pipe->plane_state->flip_immediate) { in dcn20_pipe_control_lock()1441 if (lock && (pipe->bottom_pipe != NULL || !flip_immediate)) in dcn20_pipe_control_lock()1442 if ((flip_immediate && pipe->stream_res.gsl_group == 0) || in dcn20_pipe_control_lock()[all …]
132 bool flip_immediate);
859 bool flip_immediate) in dce_mi_program_surface_flip_and_addr() argument867 GRPH_SURFACE_UPDATE_H_RETRACE_EN, flip_immediate ? 1 : 0); in dce_mi_program_surface_flip_and_addr()890 if (flip_immediate) in dce_mi_program_surface_flip_and_addr()
152 plane_state->flip_immediate); in dcn201_update_plane_addr()156 if (plane_state->flip_immediate) in dcn201_update_plane_addr()
489 bool flip_immediate) in dce_mem_input_v_program_surface_flip_and_addr() argument493 set_flip_control(mem_input110, flip_immediate); in dce_mem_input_v_program_surface_flip_and_addr()
70 bool flip_immediate; member1046 bool flip_immediate);1595 struct hubp *hubp, bool flip_immediate);
252 bool flip_immediate; member
1484 bool flip_immediate; member
761 plane->flip_immediate && stream_status->mall_stream_config.type == SUBVP_MAIN; in hwss_build_fast_sequence()797 …um_steps].params.set_flip_control_gsl_params.flip_immediate = current_mpc_pipe->plane_state->flip_… in hwss_build_fast_sequence()902 plane->flip_immediate && stream_status->mall_stream_config.type == SUBVP_MAIN; in hwss_build_fast_sequence()963 params->set_flip_control_gsl_params.flip_immediate); in hwss_execute_sequence()1346 bool flip_immediate) in hwss_add_hubp_set_flip_control_gsl() argument1350 …e->steps[*seq_state->num_steps].params.set_flip_control_gsl_params.flip_immediate = flip_immediate; in hwss_add_hubp_set_flip_control_gsl()
2944 if (updates[i].surface->flip_immediate) { in force_immediate_gsl_plane_flip()2952 if (updates[i].surface->flip_immediate) in force_immediate_gsl_plane_flip()3090 surface->flip_immediate = in copy_surface_update_to_plane()3091 srf_update->flip_addr->flip_immediate; in copy_surface_update_to_plane()3812 if (srf_updates[i].surface->flip_immediate) in dc_dmub_update_dirty_rect()3868 if (srf_updates[i].surface->flip_immediate) in build_dmub_update_dirty_rect()4043 !pipe_ctx->plane_state->flip_immediate && dc->debug.enable_tri_buf) { in commit_planes_for_stream_fast()4294 !pipe_ctx->plane_state->flip_immediate && dc->debug.enable_tri_buf) { in commit_planes_for_stream()4301 plane_state->flip_immediate = false; in commit_planes_for_stream()4393 pipe_ctx->plane_state->flip_immediate); in commit_planes_for_stream()[all …]
987 if (pipe_ctx->plane_state && pipe_ctx->plane_state->flip_immediate != 1) { in dcn401_enable_stream()1350 pipe_ctx->plane_state->flip_immediate && in dcn401_wait_for_dcc_meta_propagation()
10042 bundle->flip_addrs[planes_count].flip_immediate = in amdgpu_dm_commit_planes()