Searched refs:fixed_cntr_mask (Results 1 – 3 of 3) sorted by relevance
| /linux/arch/x86/events/ |
| H A D | core.c | 269 unsigned long *fixed_cntr_mask) in check_hw_exists() argument
294 if (*(u64 *)fixed_cntr_mask) { in check_hw_exists()
299 for_each_set_bit(i, fixed_cntr_mask, X86_PMC_IDX_MAX) { in check_hw_exists()
1719 unsigned long *cntr_mask, *fixed_cntr_mask; in perf_event_print_debug() local
1730 fixed_cntr_mask = hybrid(cpuc->pmu, fixed_cntr_mask); in perf_event_print_debug()
1771 for_each_set_bit(idx, fixed_cntr_mask, X86_PMC_IDX_MAX) { in perf_event_print_debug()
2631 if (!check_hw_exists(x86_pmu.cntr_mask, x86_pmu.fixed_cntr_mask)) in init_hw_perf_events()
3039 if (!test_bit(i - INTEL_PMC_IDX_FIXED, hybrid(cpuc->pmu, fixed_cntr_mask))) in perf_clear_dirty_counters()
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| H A D | perf_event.h | 943 unsigned long fixed_cntr_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; member
1056 unsigned long fixed_cntr_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; member
1443 unsigned long *fixed_cntr_mask);
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| /linux/arch/x86/events/intel/ |
| H A D | core.c | 3739 unsigned long *fixed_cntr_mask = hybrid(cpuc->pmu, fixed_cntr_mask); in intel_pmu_reset() local
3754 for_each_set_bit(idx, fixed_cntr_mask, INTEL_PMC_MAX_FIXED) { in intel_pmu_reset()
6035 u64 *fixed_cntr_mask, in intel_pmu_check_counters_mask() argument
6048 bit = fls64(*fixed_cntr_mask); in intel_pmu_check_counters_mask()
6052 *fixed_cntr_mask &= GENMASK_ULL(INTEL_PMC_MAX_FIXED - 1, 0); in intel_pmu_check_counters_mask()
6055 *intel_ctrl |= *fixed_cntr_mask << INTEL_PMC_IDX_FIXED; in intel_pmu_check_counters_mask()
6060 u64 fixed_cntr_mask,
6213 u64 fixed_cntr_mask = hybrid(pmu, fixed_cntr_mask64); in intel_pmu_check_event_constraints_all() local
6217 fixed_cntr_mask, intel_ctrl); in intel_pmu_check_event_constraints_all()
6468 if (!check_hw_exists(pmu->cntr_mask, pmu->fixed_cntr_mask)) { in init_hybrid_pmu()
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