| /linux/include/drm/ |
| H A D | drm_fixed.h | 34 } fixed20_12; typedef
47 static inline u32 dfixed_floor(fixed20_12 A) in dfixed_floor()
54 static inline u32 dfixed_ceil(fixed20_12 A) in dfixed_ceil()
64 static inline u32 dfixed_div(fixed20_12 A, fixed20_12 B) in dfixed_div()
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| /linux/drivers/gpu/drm/radeon/ |
| H A D | rs690.c | 72 fixed20_12 tmp; in rs690_pm_info()
261 fixed20_12 num_line_pair;
262 fixed20_12 estimated_width;
263 fixed20_12 worst_case_latency;
264 fixed20_12 consumption_rate;
265 fixed20_12 active_time;
266 fixed20_12 dbpp;
267 fixed20_12 priority_mark_max;
268 fixed20_12 priority_mark;
269 fixed20_12 sclk;
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| H A D | rv515.c | 912 fixed20_12 num_line_pair;
913 fixed20_12 estimated_width;
914 fixed20_12 worst_case_latency;
915 fixed20_12 consumption_rate;
916 fixed20_12 active_time;
917 fixed20_12 dbpp;
918 fixed20_12 priority_mark_max;
919 fixed20_12 priority_mark;
920 fixed20_12 sclk;
929 fixed20_12 a, b, c; in rv515_crtc_bandwidth_compute()
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| H A D | r100.c | 3168 fixed20_12 trcd_ff, trp_ff, tras_ff, trbs_ff, tcas_ff; in r100_bandwidth_update()
3169 fixed20_12 sclk_ff, mclk_ff, sclk_eff_ff, sclk_delay_ff; in r100_bandwidth_update()
3170 fixed20_12 peak_disp_bw, mem_bw, pix_clk, pix_clk2, temp_ff; in r100_bandwidth_update()
3171 fixed20_12 crit_point_ff = {0}; in r100_bandwidth_update()
3173 fixed20_12 memtcas_ff[8] = { in r100_bandwidth_update()
3182 fixed20_12 memtcas_rs480_ff[8] = { in r100_bandwidth_update()
3192 fixed20_12 memtcas2_ff[8] = { in r100_bandwidth_update()
3202 fixed20_12 memtrbs[8] = { in r100_bandwidth_update()
3212 fixed20_12 memtrbs_r4xx[8] = { in r100_bandwidth_update()
3222 fixed20_12 min_mem_eff; in r100_bandwidth_update()
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| H A D | radeon_device.c | 726 fixed20_12 a; in radeon_update_bandwidth_info()
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| H A D | radeon_display.c | 1768 fixed20_12 a, b; in radeon_crtc_scaling_mode_fixup()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | dce_v8_0.c | 657 fixed20_12 vsc; /* vertical scale ratio */
676 fixed20_12 dram_efficiency; /* 0.7 */ in dce_v8_0_dram_bandwidth()
677 fixed20_12 yclk, dram_channels, bandwidth; in dce_v8_0_dram_bandwidth()
678 fixed20_12 a; in dce_v8_0_dram_bandwidth()
705 fixed20_12 disp_dram_allocation; /* 0.3 to 0.7 */ in dce_v8_0_dram_bandwidth_for_display()
706 fixed20_12 yclk, dram_channels, bandwidth; in dce_v8_0_dram_bandwidth_for_display()
707 fixed20_12 a; in dce_v8_0_dram_bandwidth_for_display()
734 fixed20_12 return_efficiency; /* 0.8 */ in dce_v8_0_data_return_bandwidth()
735 fixed20_12 sclk, bandwidth; in dce_v8_0_data_return_bandwidth()
736 fixed20_12 a; in dce_v8_0_data_return_bandwidth()
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| H A D | dce_v6_0.c | 557 fixed20_12 vsc; /* vertical scale ratio */
576 fixed20_12 dram_efficiency; /* 0.7 */ in dce_v6_0_dram_bandwidth()
577 fixed20_12 yclk, dram_channels, bandwidth; in dce_v6_0_dram_bandwidth()
578 fixed20_12 a; in dce_v6_0_dram_bandwidth()
605 fixed20_12 disp_dram_allocation; /* 0.3 to 0.7 */ in dce_v6_0_dram_bandwidth_for_display()
606 fixed20_12 yclk, dram_channels, bandwidth; in dce_v6_0_dram_bandwidth_for_display()
607 fixed20_12 a; in dce_v6_0_dram_bandwidth_for_display()
634 fixed20_12 return_efficiency; /* 0.8 */ in dce_v6_0_data_return_bandwidth()
635 fixed20_12 sclk, bandwidth; in dce_v6_0_data_return_bandwidth()
636 fixed20_12 a; in dce_v6_0_data_return_bandwidth()
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| H A D | dce_v10_0.c | 704 fixed20_12 vsc; /* vertical scale ratio */
723 fixed20_12 dram_efficiency; /* 0.7 */ in dce_v10_0_dram_bandwidth()
724 fixed20_12 yclk, dram_channels, bandwidth; in dce_v10_0_dram_bandwidth()
725 fixed20_12 a; in dce_v10_0_dram_bandwidth()
752 fixed20_12 disp_dram_allocation; /* 0.3 to 0.7 */ in dce_v10_0_dram_bandwidth_for_display()
753 fixed20_12 yclk, dram_channels, bandwidth; in dce_v10_0_dram_bandwidth_for_display()
754 fixed20_12 a; in dce_v10_0_dram_bandwidth_for_display()
781 fixed20_12 return_efficiency; /* 0.8 */ in dce_v10_0_data_return_bandwidth()
782 fixed20_12 sclk, bandwidth; in dce_v10_0_data_return_bandwidth()
783 fixed20_12 a; in dce_v10_0_data_return_bandwidth()
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| H A D | amdgpu_mode.h | 479 fixed20_12 vsc;
480 fixed20_12 hsc;
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| H A D | amdgpu_display.c | 1555 fixed20_12 a, b; in amdgpu_display_crtc_scaling_mode_fixup()
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| /linux/drivers/gpu/drm/tegra/ |
| H A D | hub.c | 523 static inline u32 compute_phase_incr(fixed20_12 in, unsigned int out) in compute_phase_incr()
605 fixed20_12 width = dfixed_init(new_state->src_w >> 16); in tegra_shared_plane_atomic_update()
616 fixed20_12 height = dfixed_init(new_state->src_h >> 16); in tegra_shared_plane_atomic_update()
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| H A D | dc.c | 131 fixed20_12 outf = dfixed_init(out); in compute_dda_inc()
132 fixed20_12 inf = dfixed_init(in); in compute_dda_inc()
164 fixed20_12 inf = dfixed_init(in); in compute_initial_dda()
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| /linux/drivers/gpu/drm/tests/ |
| H A D | drm_dp_mst_helper_test.c | 74 fixed20_12 expected;
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_dp_mst.c | 351 fixed20_12 pbn; in intel_dp_mtp_tu_compute_config()
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| /linux/drivers/gpu/drm/display/ |
| H A D | drm_dp_mst_topology.c | 3593 fixed20_12 drm_dp_get_vc_payload_bw(int link_rate, int link_lane_count) in drm_dp_get_vc_payload_bw()
3597 fixed20_12 ret; in drm_dp_get_vc_payload_bw()
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