Searched refs:fclk_pstate_supported (Results 1 – 3 of 3) sorted by relevance
512 in_out->programming->fclk_pstate_supported = true; in determine_power_management_features_with_vblank_only()563 if (in_out->programming->fclk_pstate_supported == false) { in determine_power_management_features_with_vactive_and_vblank()571 in_out->programming->fclk_pstate_supported = true; in determine_power_management_features_with_vactive_and_vblank()677 in_out->programming->fclk_pstate_supported = false; in map_mode_to_soc_dpm()701 if (in_out->programming->fclk_pstate_supported == false) in dpmm_dcn3_map_mode_to_soc_dpm()722 in_out->programming->fclk_pstate_supported = true; in dpmm_dcn4_map_mode_to_soc_dpm()728 in_out->programming->fclk_pstate_supported = true; in dpmm_dcn4_map_mode_to_soc_dpm()735 if (in_out->programming->fclk_pstate_supported == false) in dpmm_dcn4_map_mode_to_soc_dpm()
212 unsigned int fclk_pstate_supported; member
814 ….clk.fclk_p_state_change_support = in_ctx->v21.mode_programming.programming->fclk_pstate_supported; in dml21_copy_clocks_to_dc_state()