Home
last modified time | relevance | path

Searched refs:event_cntr0 (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/perf/hisilicon/
H A Dhisi_uncore_its_pmu.c44 u32 event_cntr0; member
64 return readq(pmu->base + ITS_PMU_EVENT_CNTRn(reg_info->event_cntr0, hwc->idx)); in hisi_its_pmu_read_counter()
72 writeq(val, pmu->base + ITS_PMU_EVENT_CNTRn(reg_info->event_cntr0, hwc->idx)); in hisi_its_pmu_write_counter()
354 .event_cntr0 = ITS_PMU_COUNTER0,
H A Dhisi_uncore_noc_pmu.c48 u32 event_cntr0; member
93 return readq(noc_pmu->base + NOC_PMU_EVENT_CNTRn(reg_info->event_cntr0, hwc->idx)); in hisi_noc_pmu_read_counter()
101 writeq(val, noc_pmu->base + NOC_PMU_EVENT_CNTRn(reg_info->event_cntr0, hwc->idx)); in hisi_noc_pmu_write_counter()
382 .event_cntr0 = NOC_PMU_EVENT_COUNTER0,
H A Dhisi_uncore_mn_pmu.c44 u32 event_cntr0; member
74 return readq(mn_pmu->base + HISI_MN_CNTR_REGn(reg_info->event_cntr0, hwc->idx)); in hisi_mn_pmu_read_counter()
82 writeq(val, mn_pmu->base + HISI_MN_CNTR_REGn(reg_info->event_cntr0, hwc->idx)); in hisi_mn_pmu_write_counter()
387 .event_cntr0 = HISI_MN_CNTR0_REG,