| /linux/arch/arm64/mm/ |
| H A D | fault.c | 50 int (*fn)(unsigned long far, unsigned long esr, 59 static inline const struct fault_info *esr_to_fault_info(unsigned long esr) in esr_to_fault_info() argument 61 return fault_info + (esr & ESR_ELx_FSC); in esr_to_fault_info() 64 static void data_abort_decode(unsigned long esr) in data_abort_decode() argument 66 unsigned long iss2 = ESR_ELx_ISS2(esr); in data_abort_decode() 70 if (esr & ESR_ELx_ISV) { in data_abort_decode() 72 1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT)); in data_abort_decode() 74 (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT, in data_abort_decode() 75 (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT); in data_abort_decode() 77 (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT, in data_abort_decode() [all …]
|
| /linux/arch/arm64/include/asm/ |
| H A D | esr.h | 76 #define ESR_ELx_EC(esr) (((esr) & ESR_ELx_EC_MASK) >> ESR_ELx_EC_SHIFT) argument 81 #define ESR_ELx_ISS(esr) ((esr) & ESR_ELx_ISS_MASK) argument 84 #define ESR_ELx_ISS2(esr) (((esr) & ESR_ELx_ISS2_MASK) >> ESR_ELx_ISS2_SHIFT) argument 246 #define ESR_ELx_SYS64_ISS_RT(esr) \ argument 247 (((esr) & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT) 395 #define ESR_ELx_SME_ISS_SMTC(esr) ((esr) & ESR_ELx_SME_ISS_SMTC_MASK) argument 408 #define ESR_ELx_MOPS_ISS_DESTREG(esr) (((esr) & (UL(0x1f) << 10)) >> 10) argument 409 #define ESR_ELx_MOPS_ISS_SRCREG(esr) (((esr) & (UL(0x1f) << 5)) >> 5) argument 410 #define ESR_ELx_MOPS_ISS_SIZEREG(esr) (((esr) & (UL(0x1f) << 0)) >> 0) argument 440 static inline unsigned long esr_brk_comment(unsigned long esr) in esr_brk_comment() argument [all …]
|
| H A D | exception.h | 19 unsigned long esr = ESR_ELx_EC_SERROR << ESR_ELx_EC_SHIFT; in disr_to_esr() local 22 esr |= (disr & DISR_EL1_ESR_MASK); in disr_to_esr() 24 esr |= (disr & ESR_ELx_ISS_MASK); in disr_to_esr() 26 return esr; in disr_to_esr() 55 void do_mem_abort(unsigned long far, unsigned long esr, struct pt_regs *regs); 56 void do_el0_undef(struct pt_regs *regs, unsigned long esr); 57 void do_el1_undef(struct pt_regs *regs, unsigned long esr); 59 void do_el1_bti(struct pt_regs *regs, unsigned long esr); 60 void do_el0_gcs(struct pt_regs *regs, unsigned long esr); 61 void do_el1_gcs(struct pt_regs *regs, unsigned long esr); [all …]
|
| H A D | uprobes.h | 31 int uprobe_brk_handler(struct pt_regs *regs, unsigned long esr); 33 int uprobe_single_step_handler(struct pt_regs *regs, unsigned long esr); 36 unsigned long esr) in uprobe_single_step_handler() argument
|
| H A D | kprobes.h | 52 unsigned long esr); 54 unsigned long esr); 56 unsigned long esr);
|
| /linux/tools/arch/arm64/include/asm/ |
| H A D | esr.h | 73 #define ESR_ELx_EC(esr) (((esr) & ESR_ELx_EC_MASK) >> ESR_ELx_EC_SHIFT) argument 78 #define ESR_ELx_ISS(esr) ((esr) & ESR_ELx_ISS_MASK) argument 81 #define ESR_ELx_ISS2(esr) (((esr) & ESR_ELx_ISS2_MASK) >> ESR_ELx_ISS2_SHIFT) argument 226 #define ESR_ELx_SYS64_ISS_RT(esr) \ argument 227 (((esr) & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT) 386 #define ESR_ELx_MOPS_ISS_DESTREG(esr) (((esr) & (UL(0x1f) << 10)) >> 10) argument 387 #define ESR_ELx_MOPS_ISS_SRCREG(esr) (((esr) & (UL(0x1f) << 5)) >> 5) argument 388 #define ESR_ELx_MOPS_ISS_SIZEREG(esr) (((esr) & (UL(0x1f) << 0)) >> 0) argument 393 static inline unsigned long esr_brk_comment(unsigned long esr) in esr_brk_comment() argument 395 return esr & ESR_ELx_BRK64_ISS_COMMENT_MASK; in esr_brk_comment() [all …]
|
| /linux/arch/arm64/kvm/hyp/include/hyp/ |
| H A D | fault.h | 15 static inline bool __fault_safe_to_translate(u64 esr) in __fault_safe_to_translate() argument 17 u64 fsc = esr & ESR_ELx_FSC; in __fault_safe_to_translate() 19 if (esr_fsc_is_sea_ttw(esr) || esr_fsc_is_secc_ttw(esr)) in __fault_safe_to_translate() 22 return !(fsc == ESR_ELx_FSC_EXTABT && (esr & ESR_ELx_FnV)); in __fault_safe_to_translate() 60 static inline bool __hpfar_valid(u64 esr) in __hpfar_valid() argument 70 esr_fsc_is_translation_fault(esr)) in __hpfar_valid() 73 if (esr_fsc_is_translation_fault(esr) || esr_fsc_is_access_flag_fault(esr)) in __hpfar_valid() 76 if ((esr & ESR_ELx_S1PTW) && esr_fsc_is_permission_fault(esr)) in __hpfar_valid() 79 return esr_fsc_is_addr_sz_fault(esr); in __hpfar_valid() 82 static inline bool __get_fault_info(u64 esr, struct kvm_vcpu_fault_info *fault) in __get_fault_info() argument [all …]
|
| /linux/arch/arm64/kvm/ |
| H A D | inject_fault.c | 109 u64 esr = 0, fsc; in inject_abt64() local 144 esr |= ESR_ELx_IL; in inject_abt64() 151 esr |= (ESR_ELx_EC_IABT_LOW << ESR_ELx_EC_SHIFT); in inject_abt64() 153 esr |= (ESR_ELx_EC_IABT_CUR << ESR_ELx_EC_SHIFT); in inject_abt64() 156 esr |= ESR_ELx_EC_DABT_LOW << ESR_ELx_EC_SHIFT; in inject_abt64() 158 esr |= fsc; in inject_abt64() 161 vcpu_write_sys_reg(vcpu, esr, exception_esr_elx(vcpu)); in inject_abt64() 164 void kvm_inject_sync(struct kvm_vcpu *vcpu, u64 esr) in kvm_inject_sync() argument 167 vcpu_write_sys_reg(vcpu, esr, exception_esr_elx(vcpu)); in kvm_inject_sync() 172 u64 esr = (ESR_ELx_EC_UNKNOWN << ESR_ELx_EC_SHIFT) | ESR_ELx_IL; in inject_undef64() local [all …]
|
| H A D | mmio.c | 163 u64 esr; in io_mem_abort() local 165 esr = kvm_vcpu_get_esr(vcpu); in io_mem_abort() 175 trace_kvm_mmio_nisv(*vcpu_pc(vcpu), esr, in io_mem_abort() 206 if (FIELD_GET(GENMASK(12, 11), esr)) { in io_mem_abort() 208 run->arm_nisv.esr_iss = esr & ~(u64)ESR_ELx_FSC; in io_mem_abort()
|
| H A D | trace_arm.h | 140 TP_PROTO(unsigned long vcpu_pc, unsigned long esr, 142 TP_ARGS(vcpu_pc, esr, far, ipa), 146 __field( unsigned long, esr ) 153 __entry->esr = esr; 159 __entry->ipa, __entry->esr,
|
| H A D | pauth.c | 159 u64 esr = kvm_vcpu_get_esr(vcpu); in kvm_auth_eretax() local 166 if (esr_iss_is_eretab(esr)) { in kvm_auth_eretax()
|
| /linux/tools/testing/selftests/kvm/arm64/ |
| H A D | sea_to_user.c | 156 u64 esr = read_sysreg(esr_el1); in expect_sea_handler() local 161 GUEST_PRINTF("ESR_EL1=%#lx, FAR_EL1=%#lx\n", esr, far); in expect_sea_handler() 163 GUEST_ASSERT_EQ(ESR_ELx_EC(esr), ESR_ELx_EC_DABT_CUR); in expect_sea_handler() 164 GUEST_ASSERT_EQ(esr & ESR_ELx_FSC_TYPE, ESR_ELx_FSC_EXTABT); in expect_sea_handler() 167 GUEST_ASSERT_EQ(esr & ESR_ELx_FnV, ESR_ELx_FnV); in expect_sea_handler() 170 GUEST_ASSERT_EQ(esr & ESR_ELx_FnV, 0); in expect_sea_handler() 190 u64 esr; in run_vm() local 198 run->arm_sea.esr, run->arm_sea.flags); in run_vm() 204 esr = run->arm_sea.esr; in run_vm() 205 TEST_ASSERT_EQ(ESR_ELx_EC(esr), ESR_ELx_EC_DABT_LOW); in run_vm() [all …]
|
| H A D | external_aborts.c | 17 u64 esr = read_sysreg(esr_el1); in expect_sea_handler() local 20 GUEST_ASSERT_EQ(ESR_ELx_EC(esr), ESR_ELx_EC_DABT_CUR); in expect_sea_handler() 21 GUEST_ASSERT_EQ(esr & ESR_ELx_FSC_TYPE, ESR_ELx_FSC_EXTABT); in expect_sea_handler() 220 u64 esr = read_sysreg(esr_el1); in expect_serror_handler() local 222 GUEST_ASSERT_EQ(ESR_ELx_EC(esr), ESR_ELx_EC_SERROR); in expect_serror_handler() 224 GUEST_ASSERT_EQ(ESR_ELx_ISS(esr), EXPECTED_SERROR_ISS); in expect_serror_handler() 255 u64 esr = read_sysreg(esr_el1); in expect_sea_s1ptw_handler() local 258 GUEST_ASSERT_EQ(ESR_ELx_EC(esr), ESR_ELx_EC_DABT_CUR); in expect_sea_s1ptw_handler() 259 GUEST_ASSERT_EQ((esr & ESR_ELx_FSC), ESR_ELx_FSC_SEA_TTW(3)); in expect_sea_s1ptw_handler()
|
| H A D | vpmu_counter_access.c | 294 u64 esr, ec; in guest_sync_handler() local 296 esr = read_sysreg(esr_el1); in guest_sync_handler() 297 ec = ESR_ELx_EC(esr); in guest_sync_handler() 301 regs->pc, esr, ec, expected_ec); in guest_sync_handler()
|
| /linux/arch/sh/boards/mach-dreamcast/ |
| H A D | irq.c | 90 __u32 esr = ESR_BASE + (LEVEL(irq) << 2); in mask_ack_systemasic_irq() local 92 outl((1 << EVENT_BIT(irq)), esr); in mask_ack_systemasic_irq() 107 __u32 emr, esr, status, level; in systemasic_irq_demux() local 124 esr = ESR_BASE + (level << 2); in systemasic_irq_demux() 127 status = inl(esr); in systemasic_irq_demux()
|
| /linux/drivers/net/can/ |
| H A D | bxcan.c | 158 u32 esr; /* 0x18 - error status */ member 466 static void bxcan_handle_state_change(struct net_device *ndev, u32 esr) in bxcan_handle_state_change() argument 476 if (!(esr & (BXCAN_ESR_EWGF | BXCAN_ESR_EPVF | BXCAN_ESR_BOFF))) in bxcan_handle_state_change() 479 bec.txerr = FIELD_GET(BXCAN_ESR_TEC_MASK, esr); in bxcan_handle_state_change() 480 bec.rxerr = FIELD_GET(BXCAN_ESR_REC_MASK, esr); in bxcan_handle_state_change() 482 if (esr & BXCAN_ESR_BOFF) in bxcan_handle_state_change() 484 else if (esr & BXCAN_ESR_EPVF) in bxcan_handle_state_change() 486 else if (esr & BXCAN_ESR_EWGF) in bxcan_handle_state_change() 517 static void bxcan_handle_bus_err(struct net_device *ndev, u32 esr) in bxcan_handle_bus_err() argument 524 lec_code = FIELD_GET(BXCAN_ESR_LEC_MASK, esr); in bxcan_handle_bus_err() [all …]
|
| /linux/arch/powerpc/platforms/44x/ |
| H A D | machine_check.c | 14 unsigned long reason = regs->esr; in machine_check_4xx() 29 unsigned long reason = regs->esr; in machine_check_440A() 66 unsigned long reason = regs->esr; in machine_check_47x()
|
| /linux/drivers/net/ethernet/ibm/emac/ |
| H A D | mal.c | 229 u32 esr = get_mal_dcrn(mal, MAL_ESR); in mal_serr() local 232 set_mal_dcrn(mal, MAL_ESR, esr); in mal_serr() 234 MAL_DBG(mal, "SERR %08x" NL, esr); in mal_serr() 236 if (esr & MAL_ESR_EVB) { in mal_serr() 237 if (esr & MAL_ESR_DE) { in mal_serr() 244 if (esr & MAL_ESR_PEIN) { in mal_serr() 252 mal->index, esr); in mal_serr() 262 mal->index, esr); in mal_serr() 362 u32 esr = get_mal_dcrn(mal, MAL_ESR); in mal_int() local 364 if (esr & MAL_ESR_EVB) { in mal_int() [all …]
|
| /linux/arch/mips/include/asm/octeon/ |
| H A D | cvmx-sli-defs.h | 107 __BITFIELD_FIELD(uint64_t esr:2, 119 __BITFIELD_FIELD(uint64_t esr:2,
|
| /linux/arch/arm64/kernel/ |
| H A D | fpsimd.c | 1311 void do_sve_acc(unsigned long esr, struct pt_regs *regs) in do_sve_acc() argument 1444 void do_sme_acc(unsigned long esr, struct pt_regs *regs) in do_sme_acc() argument 1456 if (ESR_ELx_SME_ISS_SMTC(esr) != ESR_ELx_SME_ISS_SMTC_SME_DISABLED) { in do_sme_acc() 1489 void do_fpsimd_acc(unsigned long esr, struct pt_regs *regs) in do_fpsimd_acc() argument 1507 void do_fpsimd_exc(unsigned long esr, struct pt_regs *regs) in do_fpsimd_exc() argument 1511 if (esr & ESR_ELx_FP_EXC_TFV) { in do_fpsimd_exc() 1512 if (esr & FPEXC_IOF) in do_fpsimd_exc() 1514 else if (esr & FPEXC_DZF) in do_fpsimd_exc() 1516 else if (esr & FPEXC_OFF) in do_fpsimd_exc() 1518 else if (esr & FPEXC_UFF) in do_fpsimd_exc() [all …]
|
| H A D | kgdb.c | 237 int kgdb_brk_handler(struct pt_regs *regs, unsigned long esr) in kgdb_brk_handler() argument 244 int kgdb_compiled_brk_handler(struct pt_regs *regs, unsigned long esr) in NOKPROBE_SYMBOL() 253 int kgdb_single_step_handler(struct pt_regs *regs, unsigned long esr) in kgdb_single_step_handler() argument
|
| /linux/arch/arm64/kernel/probes/ |
| H A D | kprobes.c | 354 kprobe_brk_handler(struct pt_regs *regs, unsigned long esr) in kprobe_brk_handler() argument 398 kprobe_ss_brk_handler(struct pt_regs *regs, unsigned long esr) in kprobe_ss_brk_handler() argument 417 kretprobe_brk_handler(struct pt_regs *regs, unsigned long esr) in kretprobe_brk_handler() argument
|
| /linux/arch/powerpc/kvm/ |
| H A D | emulate.c | 223 vcpu->arch.shared->esr | ESR_PTR); in kvmppc_emulate_instruction() 239 vcpu->arch.shared->esr | ESR_PTR); in kvmppc_emulate_instruction()
|
| /linux/arch/powerpc/include/uapi/asm/ |
| H A D | kvm_para.h | 45 __u32 esr; member
|
| /linux/drivers/soc/apple/ |
| H A D | rtkit-crashlog.c | 58 u64 esr; member 165 dev_warn(rtk->dev, " ESR = 0x%llx\n", regs->esr); in apple_rtkit_crashlog_dump_regs()
|