| H A D | gfx_v11_0.c | 385 uint32_t me = 0, eng_sel = 0; in gfx11_kiq_map_queues() 390 eng_sel = 0; in gfx11_kiq_map_queues() 394 eng_sel = 4; in gfx11_kiq_map_queues() 398 eng_sel = 5; in gfx11_kiq_map_queues() 414 PACKET3_MAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx11_kiq_map_queues() 429 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx11_kiq_unmap_queues() 441 PACKET3_UNMAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx11_kiq_unmap_queues() 462 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx11_kiq_query_status() 471 PACKET3_QUERY_STATUS_ENG_SEL(eng_sel)); in gfx11_kiq_query_status() 524 static void gfx_v11_0_write_data_to_reg(struct amdgpu_ring *ring, int eng_sel, in gfx_v11_0_write_data_to_reg() 381 uint32_t me = 0, eng_sel = 0; gfx11_kiq_map_queues() local 425 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; gfx11_kiq_unmap_queues() local 458 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; gfx11_kiq_query_status() local 520 gfx_v11_0_write_data_to_reg(struct amdgpu_ring * ring,int eng_sel,bool wc,uint32_t reg,uint32_t val) gfx_v11_0_write_data_to_reg() argument 531 gfx_v11_0_wait_reg_mem(struct amdgpu_ring * ring,int eng_sel,int mem_space,int opt,uint32_t addr0,uint32_t addr1,uint32_t ref,uint32_t mask,uint32_t inv) gfx_v11_0_wait_reg_mem() argument [all...] |