Home
last modified time | relevance | path

Searched refs:eng_sel (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/net/ethernet/qlogic/qed/
H A Dqed_dev.c726 u32 addr, val, eng_sel; in qed_llh_set_ppfid_affinity() local
742 eng_sel = 0; in qed_llh_set_ppfid_affinity()
745 eng_sel = 1; in qed_llh_set_ppfid_affinity()
748 eng_sel = 2; in qed_llh_set_ppfid_affinity()
758 SET_FIELD(val, NIG_REG_PPF_TO_ENGINE_SEL_NON_ROCE, eng_sel); in qed_llh_set_ppfid_affinity()
774 u32 addr, val, eng_sel; in qed_llh_set_roce_affinity() local
786 eng_sel = 0; in qed_llh_set_roce_affinity()
789 eng_sel = 1; in qed_llh_set_roce_affinity()
792 eng_sel = 2; in qed_llh_set_roce_affinity()
809 SET_FIELD(val, NIG_REG_PPF_TO_ENGINE_SEL_ROCE, eng_sel); in qed_llh_set_roce_affinity()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_3.c204 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx_v9_4_3_kiq_map_queues() local
218 PACKET3_MAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx_v9_4_3_kiq_map_queues()
234 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx_v9_4_3_kiq_unmap_queues() local
240 PACKET3_UNMAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx_v9_4_3_kiq_unmap_queues()
261 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx_v9_4_3_kiq_query_status() local
271 PACKET3_QUERY_STATUS_ENG_SEL(eng_sel)); in gfx_v9_4_3_kiq_query_status()
374 static void gfx_v9_4_3_write_data_to_reg(struct amdgpu_ring *ring, int eng_sel, in gfx_v9_4_3_write_data_to_reg() argument
379 amdgpu_ring_write(ring, WRITE_DATA_ENGINE_SEL(eng_sel) | in gfx_v9_4_3_write_data_to_reg()
387 static void gfx_v9_4_3_wait_reg_mem(struct amdgpu_ring *ring, int eng_sel, in gfx_v9_4_3_wait_reg_mem() argument
404 WAIT_REG_MEM_ENGINE(eng_sel))); in gfx_v9_4_3_wait_reg_mem()
H A Dgfx_v12_1.c237 uint32_t me = 0, eng_sel = 0; in gfx_v12_1_kiq_map_queues() local
242 eng_sel = 0; in gfx_v12_1_kiq_map_queues()
246 eng_sel = 5; in gfx_v12_1_kiq_map_queues()
261 PACKET3_MAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx_v12_1_kiq_map_queues()
276 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx_v12_1_kiq_unmap_queues() local
288 PACKET3_UNMAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx_v12_1_kiq_unmap_queues()
308 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx_v12_1_kiq_query_status() local
317 PACKET3_QUERY_STATUS_ENG_SEL(eng_sel)); in gfx_v12_1_kiq_query_status()
354 static void gfx_v12_1_wait_reg_mem(struct amdgpu_ring *ring, int eng_sel, in gfx_v12_1_wait_reg_mem() argument
H A Dgfx_v12_0.c312 uint32_t me = 0, eng_sel = 0; in gfx_v12_0_kiq_map_queues() local
317 eng_sel = 0; in gfx_v12_0_kiq_map_queues()
321 eng_sel = 4; in gfx_v12_0_kiq_map_queues()
325 eng_sel = 5; in gfx_v12_0_kiq_map_queues()
341 PACKET3_MAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx_v12_0_kiq_map_queues()
356 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx_v12_0_kiq_unmap_queues() local
368 PACKET3_UNMAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx_v12_0_kiq_unmap_queues()
388 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx_v12_0_kiq_query_status() local
397 PACKET3_QUERY_STATUS_ENG_SEL(eng_sel)); in gfx_v12_0_kiq_query_status()
430 static void gfx_v12_0_wait_reg_mem(struct amdgpu_ring *ring, int eng_sel, in gfx_v12_0_wait_reg_mem() argument
[all …]
H A Dgfx_v11_0.c394 uint32_t me = 0, eng_sel = 0; in gfx11_kiq_map_queues() local
399 eng_sel = 0; in gfx11_kiq_map_queues()
403 eng_sel = 4; in gfx11_kiq_map_queues()
407 eng_sel = 5; in gfx11_kiq_map_queues()
423 PACKET3_MAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx11_kiq_map_queues()
438 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx11_kiq_unmap_queues() local
450 PACKET3_UNMAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx11_kiq_unmap_queues()
471 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx11_kiq_query_status() local
480 PACKET3_QUERY_STATUS_ENG_SEL(eng_sel)); in gfx11_kiq_query_status()
533 static void gfx_v11_0_write_data_to_reg(struct amdgpu_ring *ring, int eng_sel, in gfx_v11_0_write_data_to_reg() argument
[all …]
H A Dgfx_v9_0.c956 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx_v9_0_kiq_map_queues() local
970 PACKET3_MAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx_v9_0_kiq_map_queues()
986 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx_v9_0_kiq_unmap_queues() local
992 PACKET3_UNMAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx_v9_0_kiq_unmap_queues()
1014 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx_v9_0_kiq_query_status() local
1024 PACKET3_QUERY_STATUS_ENG_SEL(eng_sel)); in gfx_v9_0_kiq_query_status()
1160 static void gfx_v9_0_write_data_to_reg(struct amdgpu_ring *ring, int eng_sel, in gfx_v9_0_write_data_to_reg() argument
1164 amdgpu_ring_write(ring, WRITE_DATA_ENGINE_SEL(eng_sel) | in gfx_v9_0_write_data_to_reg()
1172 static void gfx_v9_0_wait_reg_mem(struct amdgpu_ring *ring, int eng_sel, in gfx_v9_0_wait_reg_mem() argument
1183 WAIT_REG_MEM_ENGINE(eng_sel))); in gfx_v9_0_wait_reg_mem()
H A Dgfx_v10_0.c3731 uint32_t eng_sel = 0; in gfx10_kiq_map_queues() local
3735 eng_sel = 0; in gfx10_kiq_map_queues()
3738 eng_sel = 4; in gfx10_kiq_map_queues()
3741 eng_sel = 5; in gfx10_kiq_map_queues()
3757 PACKET3_MAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx10_kiq_map_queues()
3771 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx10_kiq_unmap_queues() local
3777 PACKET3_UNMAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx10_kiq_unmap_queues()
3798 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx10_kiq_query_status() local
3807 PACKET3_QUERY_STATUS_ENG_SEL(eng_sel)); in gfx10_kiq_query_status()
4000 static void gfx_v10_0_write_data_to_reg(struct amdgpu_ring *ring, int eng_sel, in gfx_v10_0_write_data_to_reg() argument
[all …]