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Searched refs:en_val (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/rockchip/
H A Drockchip_vop2_reg.c694 .en_val = 0,
701 .en_val = 0,
708 .en_val = 0,
715 .en_val = 0,
722 .en_val = 0,
730 .en_val = RK3568_CLUSTER_WIN_CTRL0__WIN0_EN,
737 .en_val = RK3568_CLUSTER_WIN_CTRL0__WIN0_EN,
744 .en_val = RK3568_SMART_REGION0_CTRL__WIN0_EN,
751 .en_val = RK3568_SMART_REGION0_CTRL__WIN0_EN,
758 .en_val = RK3568_SMART_REGION0_CTRL__WIN0_EN,
[all …]
/linux/drivers/clk/
H A Dclk-vt8500.c78 u32 en_val; in vt8500_dclk_enable() local
83 en_val = readl(cdev->en_reg); in vt8500_dclk_enable()
84 en_val |= BIT(cdev->en_bit); in vt8500_dclk_enable()
85 writel(en_val, cdev->en_reg); in vt8500_dclk_enable()
94 u32 en_val; in vt8500_dclk_disable() local
99 en_val = readl(cdev->en_reg); in vt8500_dclk_disable()
100 en_val &= ~BIT(cdev->en_bit); in vt8500_dclk_disable()
101 writel(en_val, cdev->en_reg); in vt8500_dclk_disable()
109 u32 en_val = (readl(cdev->en_reg) & BIT(cdev->en_bit)); in vt8500_dclk_is_enabled() local
111 return en_val ? 1 : 0; in vt8500_dclk_is_enabled()
/linux/drivers/regulator/
H A Dmc13892-regulator.c337 u32 en_val = mc13892_regulators[id].enable_bit; in mc13892_gpo_regulator_enable() local
344 en_val = 0; in mc13892_gpo_regulator_enable()
349 return mc13892_powermisc_rmw(priv, mask, en_val); in mc13892_gpo_regulator_enable()
491 unsigned int en_val = 0; in mc13892_vcam_set_mode() local
496 en_val = MC13892_REGULATORMODE1_VCAMCONFIGEN; in mc13892_vcam_set_mode()
500 MC13892_REGULATORMODE1_VCAMCONFIGEN, en_val); in mc13892_vcam_set_mode()
H A Dmc13783-regulator.c330 u32 en_val = mc13xxx_regulators[id].enable_bit; in mc13783_gpo_regulator_enable() local
337 en_val = 0; in mc13783_gpo_regulator_enable()
340 en_val); in mc13783_gpo_regulator_enable()