Searched refs:eint_offset (Results 1 – 6 of 6) sorted by relevance
70 reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_mask()99 reg_pend = our_chip->eint_pend + bank->eint_offset; in exynos_irq_ack()135 reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_unmask()193 reg_con = our_chip->eint_con + bank->eint_offset; in exynos_irq_set_type()526 unsigned long bit = 1UL << (2 * bank->eint_offset + irqd->hwirq); in exynos_wkup_irq_set_wake()749 + b->eint_offset); in exynos_irq_demux_eint16_31()751 + b->eint_offset); in exynos_irq_demux_eint16_31()888 + bank->eint_offset); in exynos_pinctrl_suspend()890 + 2 * bank->eint_offset); in exynos_pinctrl_suspend()892 + 2 * bank->eint_offset + 4); in exynos_pinctrl_suspend()[all …]
117 .eint_offset = eoffs, \129 .eint_offset = eoffs, \141 .eint_offset = eoffs, \153 .eint_offset = eoffs, \183 .eint_offset = eoffs, \195 .eint_offset = eoffs, \320 unsigned char index = EINT_OFFS(bank->eint_offset) + irqd->hwirq; in s3c64xx_gpio_irq_set_mask()321 void __iomem *reg = d->virt_base + EINTMASK_REG(bank->eint_offset); in s3c64xx_gpio_irq_set_mask()346 unsigned char index = EINT_OFFS(bank->eint_offset) + irqd->hwirq; in s3c64xx_gpio_irq_ack()347 void __iomem *reg = d->virt_base + EINTPEND_REG(bank->eint_offset); in s3c64xx_gpio_irq_ack()[all …]
159 u32 eint_offset; member206 u32 eint_offset; member
1234 bank->eint_offset = bdata->eint_offset; in samsung_pinctrl_get_soc_data()
236 #define eint_offset(irq) ((irq) - IRQ_EINT(0)) macro237 #define eint_irq_to_bit(irq) ((u32)(1 << eint_offset(irq)))271 int offs = eint_offset(data->irq); in s3c_irq_eint_set_type()
445 int virq, eint_offset; in mtk_eint_set_debounce() local456 eint_offset = (idx % 4) * 8; in mtk_eint_set_debounce()480 clr_bit = 0xff << eint_offset; in mtk_eint_set_debounce()484 eint_offset; in mtk_eint_set_debounce()485 rst = MTK_EINT_DBNC_RST_BIT << eint_offset; in mtk_eint_set_debounce()