/linux/arch/powerpc/kernel/ |
H A D | eeh_pe.c | 124 ret = eeh_ops->get_state(pe, &mwait); in eeh_wait_state() 649 eeh_ops->read_config(edev, cap + PCI_EXP_SLTSTA, 2, &val); in eeh_bridge_check_link() 656 eeh_ops->read_config(edev, cap + PCI_EXP_SLTCAP, 2, &val); in eeh_bridge_check_link() 658 eeh_ops->read_config(edev, cap + PCI_EXP_SLTCTL, 2, &val); in eeh_bridge_check_link() 663 eeh_ops->write_config(edev, cap + PCI_EXP_SLTCTL, 2, val); in eeh_bridge_check_link() 669 eeh_ops->read_config(edev, cap + PCI_EXP_LNKCTL, 2, &val); in eeh_bridge_check_link() 671 eeh_ops->write_config(edev, cap + PCI_EXP_LNKCTL, 2, val); in eeh_bridge_check_link() 686 eeh_ops->read_config(edev, cap + PCI_EXP_LNKSTA, 2, &val); in eeh_bridge_check_link() 710 eeh_ops->write_config(edev, i*4, 4, edev->config_space[i]); in eeh_restore_bridge_bars() 712 eeh_ops->write_config(edev, 14*4, 4, edev->config_space[14]); in eeh_restore_bridge_bars() [all …]
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H A D | eeh.c | 109 struct eeh_ops *eeh_ops = NULL; variable 182 eeh_ops->read_config(edev, PCI_VENDOR_ID, 4, &cfg); in eeh_dump_dev_log() 186 eeh_ops->read_config(edev, PCI_COMMAND, 4, &cfg); in eeh_dump_dev_log() 192 eeh_ops->read_config(edev, PCI_SEC_STATUS, 2, &cfg); in eeh_dump_dev_log() 196 eeh_ops->read_config(edev, PCI_BRIDGE_CONTROL, 2, &cfg); in eeh_dump_dev_log() 204 eeh_ops->read_config(edev, cap, 4, &cfg); in eeh_dump_dev_log() 208 eeh_ops->read_config(edev, cap+4, 4, &cfg); in eeh_dump_dev_log() 220 eeh_ops->read_config(edev, cap+4*i, 4, &cfg); in eeh_dump_dev_log() 247 eeh_ops->read_config(edev, cap+4*i, 4, &cfg); in eeh_dump_dev_log() 328 eeh_ops->configure_bridge(pe); in eeh_slot_error_detail() [all …]
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H A D | eeh_sysfs.c | 51 state = eeh_ops->get_state(edev->pe, NULL); in eeh_pe_state_show() 100 if (!edev || !edev->pe || !eeh_ops->notify_resume) in eeh_notify_resume_store() 103 if (eeh_ops->notify_resume(edev)) in eeh_notify_resume_store()
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H A D | eeh_driver.c | 427 if (eeh_ops->notify_resume) in eeh_report_resume() 428 eeh_ops->notify_resume(edev); in eeh_report_resume() 671 eeh_ops->configure_bridge(pe); in eeh_reset_device() 1137 rc = eeh_ops->next_error(&pe); in eeh_handle_special_event()
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/linux/arch/powerpc/platforms/powernv/ |
H A D | eeh-powernv.c | 76 if (!eeh_ops || !eeh_ops->err_inject) in pnv_eeh_ei_write() 96 ret = eeh_ops->err_inject(pe, type, func, addr, mask); in pnv_eeh_ei_write() 817 eeh_ops->read_config(edev, aer + PCI_ERR_UNCOR_MASK, in __pnv_eeh_bridge_reset() 820 eeh_ops->write_config(edev, aer + PCI_ERR_UNCOR_MASK, in __pnv_eeh_bridge_reset() 824 eeh_ops->read_config(edev, PCI_BRIDGE_CONTROL, 2, &ctrl); in __pnv_eeh_bridge_reset() 826 eeh_ops->write_config(edev, PCI_BRIDGE_CONTROL, 2, ctrl); in __pnv_eeh_bridge_reset() 831 eeh_ops->read_config(edev, PCI_BRIDGE_CONTROL, 2, &ctrl); in __pnv_eeh_bridge_reset() 833 eeh_ops->write_config(edev, PCI_BRIDGE_CONTROL, 2, ctrl); in __pnv_eeh_bridge_reset() 839 eeh_ops->read_config(edev, aer + PCI_ERR_UNCOR_MASK, in __pnv_eeh_bridge_reset() 842 eeh_ops->write_config(edev, aer + PCI_ERR_UNCOR_MASK, in __pnv_eeh_bridge_reset() [all …]
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/linux/arch/powerpc/include/asm/ |
H A D | eeh.h | 215 struct eeh_ops { struct 235 extern struct eeh_ops *eeh_ops; argument 294 int __init eeh_init(struct eeh_ops *ops);
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/linux/arch/powerpc/platforms/pseries/ |
H A D | eeh_pseries.c | 438 ret = eeh_ops->set_option(&pe, EEH_OPT_ENABLE); in pseries_eeh_init_edev() 824 static struct eeh_ops pseries_eeh_ops = {
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