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Searched refs:edged (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/clk/xilinx/
H A Dclk-xlnx-clock-wizard.c240 u32 value, regh, edged, p5en, p5fedge, regval, regval1; in clk_wzrd_ver_dynamic_reconfig() local
253 edged = 1; in clk_wzrd_ver_dynamic_reconfig()
254 regval1 |= (edged << WZRD_EDGE_SHIFT); in clk_wzrd_ver_dynamic_reconfig()
446 u32 regh, edged, p5en, p5fedge, value2, m, regval, regval1, value; in clk_wzrd_dynamic_ver_all_nolock() local
458 edged = m % WZRD_DUTY_CYCLE; in clk_wzrd_dynamic_ver_all_nolock()
463 if (edged) in clk_wzrd_dynamic_ver_all_nolock()
475 edged = value2 % WZRD_DUTY_CYCLE; in clk_wzrd_dynamic_ver_all_nolock()
477 regval1 = FIELD_PREP(WZRD_DIVCLK_EDGE, edged); in clk_wzrd_dynamic_ver_all_nolock()
491 edged = 1; in clk_wzrd_dynamic_ver_all_nolock()
492 regval1 |= edged << WZRD_CLKFBOUT_H_SHIFT; in clk_wzrd_dynamic_ver_all_nolock()
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