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Searched refs:edac_reg_offset (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/edac/
H A Dqcom_edac.c98 ret = regmap_update_bits(llcc_bcast_regmap, drv->edac_reg_offset->cmn_interrupt_0_enable, in qcom_llcc_core_setup()
104 ret = regmap_update_bits(llcc_bcast_regmap, drv->edac_reg_offset->trp_interrupt_0_enable, in qcom_llcc_core_setup()
111 ret = regmap_write(llcc_bcast_regmap, drv->edac_reg_offset->drp_ecc_error_cfg, in qcom_llcc_core_setup()
116 ret = regmap_update_bits(llcc_bcast_regmap, drv->edac_reg_offset->cmn_interrupt_0_enable, in qcom_llcc_core_setup()
122 ret = regmap_write(llcc_bcast_regmap, drv->edac_reg_offset->drp_interrupt_enable, in qcom_llcc_core_setup()
137 drv->edac_reg_offset->drp_interrupt_clear, in qcom_llcc_clear_error_status()
143 drv->edac_reg_offset->drp_ecc_error_cntr_clear, in qcom_llcc_clear_error_status()
151 drv->edac_reg_offset->trp_interrupt_0_clear, in qcom_llcc_clear_error_status()
157 drv->edac_reg_offset->trp_ecc_error_cntr_clear, in qcom_llcc_clear_error_status()
179 const struct llcc_edac_reg_offset *edac_reg_offset = drv->edac_reg_offset; in get_reg_offsets() local
[all …]
/linux/drivers/soc/qcom/
H A Dllcc-qcom.c150 const struct llcc_edac_reg_offset *edac_reg_offset; member
4062 .edac_reg_offset = &llcc_v6_edac_reg_offset,
4071 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4081 .edac_reg_offset = &llcc_v1_edac_reg_offset,
4090 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4100 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4106 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4112 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4118 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4127 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
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/linux/include/linux/soc/qcom/
H A Dllcc-qcom.h152 * @edac_reg_offset: Offset of the LLCC EDAC registers
167 const struct llcc_edac_reg_offset *edac_reg_offset;
163 const struct llcc_edac_reg_offset *edac_reg_offset; global() member