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Searched refs:edac_dbg (Results 1 – 25 of 40) sorted by relevance

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/linux/drivers/edac/
H A Di7300_edac.c597 edac_dbg(2, "\tMTR%d CH%d: DIMMs are %sPresent (mtr)\n", in decode_mtr()
620 edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); in decode_mtr()
622 edac_dbg(2, "\t\tELECTRICAL THROTTLING is %s\n", in decode_mtr()
625 edac_dbg(2, "\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr)); in decode_mtr()
626 edac_dbg(2, "\t\tNUMRANK: %s\n", in decode_mtr()
628 edac_dbg(2, "\t\tNUMROW: %s\n", in decode_mtr()
633 edac_dbg(2, "\t\tNUMCOL: %s\n", in decode_mtr()
638 edac_dbg(2, "\t\tSIZE: %d MB\n", dinfo->megabytes); in decode_mtr()
654 edac_dbg(2, "\t\tECC code is 8-byte-over-32-byte SECDED+ code\n"); in decode_mtr()
656 edac_dbg(2, "\t\tECC code is on Lockstep mode\n"); in decode_mtr()
[all …]
H A Di5400_edac.c552 …edac_dbg(0, "\t\t%s DIMM= %d Channels= %d,%d (Branch= %d DRAM Bank= %d Buffer ID = %d rdwr= %s r… in i5400_proccess_non_recoverable_info()
604 edac_dbg(0, "\tCorrected bits= 0x%lx\n", allErrors); in i5400_process_nonfatal_error_info()
625 edac_dbg(0, "\t\tDIMM= %d Channel= %d (Branch %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5400_process_nonfatal_error_info()
776 edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s %x:%x\n", in i5400_get_devices()
779 edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s %x:%x\n", in i5400_get_devices()
783 edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s %x:%x\n", in i5400_get_devices()
873 edac_dbg(0, "ERROR: trying to access an invalid dimm: %d\n", in determine_mtr()
894 edac_dbg(2, "\tMTR%d=0x%x: DIMMs are %sPresent\n", in decode_mtr()
899 edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); in decode_mtr()
901 edac_dbg(2, "\t\tELECTRICAL THROTTLING is %s\n", in decode_mtr()
[all …]
H A Dedac_pci_sysfs.c78 edac_dbg(0, "\n"); in edac_pci_instance_release()
162 edac_dbg(0, "\n"); in edac_pci_create_instance_kobj()
178 edac_dbg(2, "failed to register instance pci%d\n", idx); in edac_pci_create_instance_kobj()
184 edac_dbg(1, "Register instance 'pci%d' kobject\n", idx); in edac_pci_create_instance_kobj()
201 edac_dbg(0, "\n"); in edac_pci_unregister_sysfs_instance_kobj()
318 edac_dbg(0, "here to module_put(THIS_MODULE)\n"); in edac_pci_release_main_kobj()
344 edac_dbg(0, "\n"); in edac_pci_main_kobj_setup()
360 edac_dbg(1, "try_module_get() failed\n"); in edac_pci_main_kobj_setup()
366 edac_dbg(1, "Failed to allocate\n"); in edac_pci_main_kobj_setup()
380 edac_dbg(1, "Failed to register '.../edac/pci'\n"); in edac_pci_main_kobj_setup()
[all …]
H A Di5000_edac.c487 edac_dbg(0, "\t\tCSROW= %d Channel= %d (DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5000_process_fatal_error_info()
566 edac_dbg(0, "\tUncorrected bits= 0x%x\n", ue_errors); in i5000_process_nonfatal_error_info()
582 …edac_dbg(0, "\t\tCSROW= %d Channels= %d,%d (Branch= %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n… in i5000_process_nonfatal_error_info()
636 edac_dbg(0, "\tCorrected bits= 0x%x\n", ce_errors); in i5000_process_nonfatal_error_info()
654 edac_dbg(0, "\t\tCSROW= %d Channel= %d (Branch %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5000_process_nonfatal_error_info()
839 edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s %x:%x\n", in i5000_get_devices()
842 edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s %x:%x\n", in i5000_get_devices()
846 edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s %x:%x\n", in i5000_get_devices()
971 edac_dbg(2, "\tMTR%d=0x%x: DIMMs are %sPresent\n", in decode_mtr()
976 edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); in decode_mtr()
[all …]
H A Dedac_mc.c84 edac_dbg(4, " channel->chan_idx = %d\n", chan->chan_idx); in edac_mc_dump_channel()
85 edac_dbg(4, " channel = %p\n", chan); in edac_mc_dump_channel()
86 edac_dbg(4, " channel->csrow = %p\n", chan->csrow); in edac_mc_dump_channel()
87 edac_dbg(4, " channel->dimm = %p\n", chan->dimm); in edac_mc_dump_channel()
99 edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n", in edac_mc_dump_dimm()
102 edac_dbg(4, " dimm = %p\n", dimm); in edac_mc_dump_dimm()
103 edac_dbg(4, " dimm->label = '%s'\n", dimm->label); in edac_mc_dump_dimm()
104 edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm->nr_pages); in edac_mc_dump_dimm()
105 edac_dbg(4, " dimm->grain = %d\n", dimm->grain); in edac_mc_dump_dimm()
110 edac_dbg(4, "csrow->csrow_idx = %d\n", csrow->csrow_idx); in edac_mc_dump_csrow()
[all …]
H A Di3200_edac.c114 edac_dbg(0, "In single channel mode\n"); in how_many_channels()
117 edac_dbg(0, "In dual channel mode\n"); in how_many_channels()
122 edac_dbg(0, "2 DIMMS per channel disabled\n"); in how_many_channels()
124 edac_dbg(0, "2 DIMMS per channel enabled\n"); in how_many_channels()
300 edac_dbg(0, "drb[0][%d] = %d, drb[1][%d] = %d\n", i, drbs[0][i], i, drbs[1][i]); in i3200_get_drbs()
346 edac_dbg(0, "MC:\n"); in i3200_probe1()
366 edac_dbg(3, "MC: init mci\n"); in i3200_probe1()
400 edac_dbg(0, "csrow %d, channel %d%s, size = %ld MiB\n", i, j, in i3200_probe1()
415 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); in i3200_probe1()
420 edac_dbg(3, "MC: success\n"); in i3200_probe1()
[all …]
H A Dedac_device_sysfs.c206 edac_dbg(4, "control index=%d\n", edac_dev->dev_idx); in edac_device_ctrl_master_release()
235 edac_dbg(1, "\n"); in edac_device_register_sysfs_main_kobj()
262 edac_dbg(1, "Failed to register '.../edac/%s'\n", in edac_device_register_sysfs_main_kobj()
272 edac_dbg(4, "Registered '.../edac/%s' kobject\n", edac_dev->name); in edac_device_register_sysfs_main_kobj()
291 edac_dbg(0, "\n"); in edac_device_unregister_sysfs_main_kobj()
292 edac_dbg(4, "name of kobject is: %s\n", kobject_name(&dev->kobj)); in edac_device_unregister_sysfs_main_kobj()
329 edac_dbg(1, "\n"); in edac_device_ctrl_instance_release()
436 edac_dbg(1, "\n"); in edac_device_ctrl_block_release()
503 edac_dbg(4, "Instance '%s' inst_p=%p block '%s' block_p=%p\n", in edac_device_create_block()
505 edac_dbg(4, "block kobj=%p block kobj->parent=%p\n", in edac_device_create_block()
[all …]
H A Dr82600_edac.c237 edac_dbg(1, "Row=%d DRBA = %#0x\n", index, drbar); in r82600_init_csrows()
242 edac_dbg(1, "Row=%d, Boundary Address=%#0x, Last = %#0x\n", in r82600_init_csrows()
278 edac_dbg(0, "\n"); in r82600_probe1()
283 edac_dbg(2, "sdram refresh rate = %#0x\n", sdram_refresh_rate); in r82600_probe1()
284 edac_dbg(2, "DRAMC register = %#0x\n", dramcr); in r82600_probe1()
295 edac_dbg(0, "mci = %p\n", mci); in r82600_probe1()
311 edac_dbg(3, "mci = %p - Scrubbing disabled! EAP: %#0x\n", in r82600_probe1()
328 edac_dbg(3, "failed edac_mc_add_mc()\n"); in r82600_probe1()
335 edac_dbg(3, "Disabling Hardware Scrub (scrub on error)\n"); in r82600_probe1()
350 edac_dbg(3, "success\n"); in r82600_probe1()
[all …]
H A De7xxx_edac.c168 edac_dbg(3, "\n"); in e7xxx_find_channel()
188 edac_dbg(3, "\n"); in ctl_page_to_phys()
210 edac_dbg(3, "\n"); in process_ce()
227 edac_dbg(3, "\n"); in process_ce_no_info()
237 edac_dbg(3, "\n"); in process_ue()
250 edac_dbg(3, "\n"); in process_ue_no_info()
384 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in e7xxx_init_csrows()
430 edac_dbg(0, "mci\n"); in e7xxx_probe1()
453 edac_dbg(3, "init mci\n"); in e7xxx_probe1()
460 edac_dbg(3, "init pvt\n"); in e7xxx_probe1()
[all …]
H A Damd64_edac.c362 edac_dbg(2, "sys_addr 0x%lx doesn't match any node\n", in find_mc_by_sys_addr()
461 edac_dbg(2, "InputAddr 0x%lx matches csrow %d (node %d)\n", in input_addr_to_csrow()
468 edac_dbg(2, "no matching csrow for InputAddr 0x%lx (MC node %d)\n", in input_addr_to_csrow()
497 edac_dbg(1, " revision %d for node %d does not support DHAR\n", in get_dram_hole_info()
504 edac_dbg(1, " Dram Memory Hoisting is DISABLED on this system\n"); in get_dram_hole_info()
509 edac_dbg(1, " Dram Memory Hoisting is DISABLED on this node %d\n", in get_dram_hole_info()
538 edac_dbg(1, " DHAR info for node %d base 0x%lx offset 0x%lx size 0x%lx\n", in get_dram_hole_info()
734 edac_dbg(0, "section=0x%x word_bits=0x%x\n", section, word_bits); in inject_read_store()
783 edac_dbg(0, "section=0x%x word_bits=0x%x\n", section, word_bits); in inject_write_store()
870 edac_dbg(2, "using DHAR to translate SysAddr 0x%lx to DramAddr 0x%lx\n", in sys_addr_to_dram_addr()
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H A Dedac_pci.c33 edac_dbg(1, "\n"); in edac_pci_alloc_ctl_info()
59 edac_dbg(1, "\n"); in edac_pci_free_ctl_info()
76 edac_dbg(1, "\n"); in find_edac_pci_by_dev()
101 edac_dbg(1, "\n"); in add_edac_pci_to_global_list()
170 edac_dbg(3, "checking\n"); in edac_pci_workq_function()
202 edac_dbg(0, "\n"); in edac_pci_add_device()
249 edac_dbg(0, "\n"); in edac_pci_del_device()
286 edac_dbg(4, "\n"); in edac_pci_generic_check()
321 edac_dbg(3, "failed edac_pci_add_device()\n"); in edac_pci_create_generic_ctl()
332 edac_dbg(0, "pci mod=%s\n", pci->mod_name); in edac_pci_release_generic_ctl()
H A Di82443bxgx_edac.c201 edac_dbg(1, "MC%d: Row=%d DRB = %#0x\n", in i82443bxgx_init_csrows()
205 edac_dbg(1, "MC%d: Row=%d, Boundary Address=%#0x, Last = %#0x\n", in i82443bxgx_init_csrows()
240 edac_dbg(0, "MC:\n"); in i82443bxgx_edacmc_probe1()
258 edac_dbg(0, "MC: mci = %p\n", mci); in i82443bxgx_edacmc_probe1()
274 edac_dbg(0, "Unknown/reserved DRAM type value in DRAMC register!\n"); in i82443bxgx_edacmc_probe1()
303 edac_dbg(0, "Unknown/reserved ECC state in NBXCFG register!\n"); in i82443bxgx_edacmc_probe1()
326 edac_dbg(3, "failed edac_mc_add_mc()\n"); in i82443bxgx_edacmc_probe1()
341 edac_dbg(3, "MC: success\n"); in i82443bxgx_edacmc_probe1()
355 edac_dbg(0, "MC:\n"); in i82443bxgx_edacmc_init_one()
370 edac_dbg(0, "\n"); in i82443bxgx_edacmc_remove_one()
[all …]
H A Die31200_edac.c225 edac_dbg(0, "In single channel mode\n"); in how_many_channels()
228 edac_dbg(0, "In dual channel mode\n"); in how_many_channels()
234 edac_dbg(0, "2 DIMMS per channel disabled\n"); in how_many_channels()
236 edac_dbg(0, "2 DIMMS per channel enabled\n"); in how_many_channels()
420 edac_dbg(0, "MC:\n"); in ie31200_probe1()
445 edac_dbg(3, "MC: init mci\n"); in ie31200_probe1()
474 edac_dbg(0, "addr_decode: 0x%x\n", addr_decode); in ie31200_probe1()
478 edac_dbg(0, "size: 0x%x, rank: %d, width: %d\n", in ie31200_probe1()
504 edac_dbg(0, "set nr pages: 0x%lx\n", nr_pages); in ie31200_probe1()
515 edac_dbg(0, "set nr pages: 0x%lx\n", nr_pages); in ie31200_probe1()
[all …]
H A Di82860_edac.c168 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in i82860_init_csrows()
210 edac_dbg(3, "init mci\n"); in i82860_probe1()
228 edac_dbg(3, "failed edac_mc_add_mc()\n"); in i82860_probe1()
244 edac_dbg(3, "success\n"); in i82860_probe1()
259 edac_dbg(0, "\n"); in i82860_init_one()
277 edac_dbg(0, "\n"); in i82860_remove_one()
310 edac_dbg(3, "\n"); in i82860_init()
323 edac_dbg(0, "860 pci_get_device fail\n"); in i82860_init()
331 edac_dbg(0, "860 init fail\n"); in i82860_init()
349 edac_dbg(3, "\n"); in i82860_exit()
H A Di82975x_edac.c394 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in i82975x_init_csrows()
479 edac_dbg(0, "\n"); in i82975x_probe1()
483 edac_dbg(3, "failed, MCHBAR disabled!\n"); in i82975x_probe1()
489 edac_dbg(3, "error ioremapping MCHBAR!\n"); in i82975x_probe1()
552 edac_dbg(3, "init mci\n"); in i82975x_probe1()
562 edac_dbg(3, "init pvt\n"); in i82975x_probe1()
571 edac_dbg(3, "failed edac_mc_add_mc()\n"); in i82975x_probe1()
576 edac_dbg(3, "success\n"); in i82975x_probe1()
594 edac_dbg(0, "\n"); in i82975x_init_one()
612 edac_dbg(0, "\n"); in i82975x_remove_one()
[all …]
H A Di82875p_edac.c366 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in i82875p_init_csrows()
399 edac_dbg(0, "\n"); in i82875p_probe1()
418 edac_dbg(3, "init mci\n"); in i82875p_probe1()
428 edac_dbg(3, "init pvt\n"); in i82875p_probe1()
439 edac_dbg(3, "failed edac_mc_add_mc()\n"); in i82875p_probe1()
455 edac_dbg(3, "success\n"); in i82875p_probe1()
476 edac_dbg(0, "\n"); in i82875p_init_one()
495 edac_dbg(0, "\n"); in i82875p_remove_one()
541 edac_dbg(3, "\n"); in i82875p_init()
556 edac_dbg(0, "875p pci_get_device fail\n"); in i82875p_init()
[all …]
H A Dx38_edac.c106 edac_dbg(0, "In single channel mode\n"); in how_many_channel()
109 edac_dbg(0, "In dual channel mode\n"); in how_many_channel()
327 edac_dbg(0, "MC:\n"); in x38_probe1()
348 edac_dbg(3, "MC: init mci\n"); in x38_probe1()
397 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); in x38_probe1()
402 edac_dbg(3, "MC: success\n"); in x38_probe1()
417 edac_dbg(0, "MC:\n"); in x38_init_one()
433 edac_dbg(0, "\n"); in x38_remove_one()
466 edac_dbg(3, "MC:\n"); in x38_init()
480 edac_dbg(0, "x38 pci_get_device fail\n"); in x38_init()
[all …]
H A Digen6_edac.c700 edac_dbg(0, "Address 0x%llx out of range\n", addr); in igen6_decode()
874 edac_dbg(2, "MC %d, ecclog = 0x%llx\n", node->mc, node->ecclog); in ecclog_work_cb()
941 edac_dbg(0, "CPU %d: Machine Check %s: 0x%llx Bank %d: 0x%llx\n", in ecclog_mce_handler()
944 edac_dbg(0, "TSC 0x%llx\n", mce->tsc); in ecclog_mce_handler()
945 edac_dbg(0, "ADDR 0x%llx\n", mce->addr); in ecclog_mce_handler()
946 edac_dbg(0, "MISC 0x%llx\n", mce->misc); in ecclog_mce_handler()
947 edac_dbg(0, "PROCESSOR %u:0x%x TIME %llu SOCKET %u APIC 0x%x\n", in ecclog_mce_handler()
988 edac_dbg(2, "\n"); in igen6_get_dimm_config()
1028 edac_dbg(0, "MC %d, Channel %d, DIMM %d, Size %llu MiB (%u pages)\n", in igen6_get_dimm_config()
1040 edac_dbg(0, "MC %d, total size %llu MiB\n", mc, imc->size >> 20); in igen6_get_dimm_config()
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H A Dsb_edac.c708 edac_dbg(0, "Invalid number of ranks: %d (max = %i) raw value = %x (%04x)\n", in numrank()
721 edac_dbg(0, "Invalid number of rows: %d (should be between 14 and 17) raw value = %x (%04x)\n", in numrow()
734 edac_dbg(0, "Invalid number of cols: %d (max = 4) raw value = %x (%04x)\n", in numcol()
1382 edac_dbg(0, "edc route table for CHA %d: %s\n", in knl_get_dimm_capacity()
1385 edac_dbg(0, "edc route table for CHA %d-%d: %s\n", in knl_get_dimm_capacity()
1392 edac_dbg(0, "edc route table for CHA %d: %s\n", in knl_get_dimm_capacity()
1395 edac_dbg(0, "edc route table for CHA %d-%d: %s\n", in knl_get_dimm_capacity()
1407 edac_dbg(0, "mc route table for CHA %d: %s\n", in knl_get_dimm_capacity()
1410 edac_dbg(0, "mc route table for CHA %d-%d: %s\n", in knl_get_dimm_capacity()
1417 edac_dbg(0, "mc route table for CHA %d: %s\n", in knl_get_dimm_capacity()
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H A Di3000_edac.c322 edac_dbg(0, "MC:\n"); in i3000_probe1()
366 edac_dbg(3, "MC: init mci\n"); in i3000_probe1()
398 edac_dbg(3, "MC: (%d) cumul_size 0x%x\n", i, cumul_size); in i3000_probe1()
427 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); in i3000_probe1()
443 edac_dbg(3, "MC: success\n"); in i3000_probe1()
458 edac_dbg(0, "MC:\n"); in i3000_init_one()
474 edac_dbg(0, "\n"); in i3000_remove_one()
508 edac_dbg(3, "MC:\n"); in i3000_init()
522 edac_dbg(0, "i3000 pci_get_device fail\n"); in i3000_init()
529 edac_dbg(0, "i3000 init fail\n"); in i3000_init()
[all …]
H A Dedac_device.c43 edac_dbg(3, "\tedac_dev = %p dev_idx=%d\n", in edac_device_dump_device()
45 edac_dbg(4, "\tedac_dev->edac_check = %p\n", edac_dev->edac_check); in edac_device_dump_device()
46 edac_dbg(3, "\tdev = %p\n", edac_dev->dev); in edac_device_dump_device()
47 edac_dbg(3, "\tmod_name:ctl_name = %s:%s\n", in edac_device_dump_device()
49 edac_dbg(3, "\tpvt_info = %p\n\n", edac_dev->pvt_info); in edac_device_dump_device()
68 edac_dbg(4, "instances=%d blocks=%d\n", nr_instances, nr_blocks); in edac_device_alloc_ctl_info()
122 edac_dbg(4, "instance=%d inst_p=%p block=#%d block_p=%p name='%s'\n", in edac_device_alloc_ctl_info()
174 edac_dbg(0, "\n"); in find_edac_device_by_dev()
307 edac_dbg(0, "\n"); in edac_device_workq_setup()
373 edac_dbg(0, "\n"); in edac_device_add_device()
[all …]
H A Di7core_edac.c507 edac_dbg(0, "QPI %d control=0x%08x status=0x%08x dod=0x%08x map=0x%08x\n", in get_dimm_config()
512 edac_dbg(0, "ECC enabled with x%d SDCC\n", ECCx8(pvt) ? 8 : 4); in get_dimm_config()
518 edac_dbg(0, "ECC disabled\n"); in get_dimm_config()
523 edac_dbg(0, "DOD Max limits: DIMMS: %d, %d-ranked, %d-banked x%x x 0x%x\n", in get_dimm_config()
537 edac_dbg(0, "Channel %i is not active\n", i); in get_dimm_config()
541 edac_dbg(0, "Channel %i is disabled\n", i); in get_dimm_config()
572 edac_dbg(0, "Ch%d phy rd%d, wr%d (0x%08x): %s%s%s%cDIMMs\n", in get_dimm_config()
597 edac_dbg(0, "\tdimm %d %d MiB offset: %x, bank: %d, rank: %d, row: %#x, col: %#x\n", in get_dimm_config()
636 edac_dbg(1, "\t[%i] DIVBY3\tREMOVED\tOFFSET\n", i); in get_dimm_config()
638 edac_dbg(1, "\t\t%#x\t%#x\t%#x\n", in get_dimm_config()
[all …]
H A Dskx_base.c277 edac_dbg(0, "Address 0x%llx out of range\n", addr); in skx_sad_decode()
292 edac_dbg(0, "No SAD entry for 0x%llx\n", addr); in skx_sad_decode()
318 edac_dbg(0, "Double remote!\n"); in skx_sad_decode()
326 edac_dbg(0, "Can't find node %d\n", SKX_ILV_TARGET(tgt)); in skx_sad_decode()
344 edac_dbg(0, "illegal mod3mode\n"); in skx_sad_decode()
370 edac_dbg(2, "0x%llx: socket=%d imc=%d channel=%d\n", in skx_sad_decode()
417 edac_dbg(0, "No TAD entry for 0x%llx\n", res->addr); in skx_tad_decode()
445 edac_dbg(2, "0x%llx: chan_addr=0x%llx sktways=%d chanways=%d\n", in skx_tad_decode()
487 edac_dbg(0, "No RIR entry for 0x%llx\n", res->addr); in skx_rir_decode()
506 edac_dbg(2, "0x%llx: dimm=%d rank=%d chan_rank=%d rank_addr=0x%llx\n", in skx_rir_decode()
[all …]
H A Damd76x_edac.c242 edac_dbg(0, "\n"); in amd76x_probe1()
257 edac_dbg(0, "mci = %p\n", mci); in amd76x_probe1()
276 edac_dbg(3, "failed edac_mc_add_mc()\n"); in amd76x_probe1()
292 edac_dbg(3, "success\n"); in amd76x_probe1()
304 edac_dbg(0, "\n"); in amd76x_init_one()
322 edac_dbg(0, "\n"); in amd76x_remove_one()
H A Dskx_common.c82 edac_dbg(2, "adxl_nm_bitmap: 0x%lx\n", adxl_nm_bitmap); in skx_adxl_get()
129 edac_dbg(0, "Address 0x%llx out of range\n", res->addr); in skx_adxl_decode()
134 edac_dbg(0, "Failed to decode 0x%llx\n", res->addr); in skx_adxl_decode()
283 edac_dbg(2, "busses: 0x%x, 0x%x, 0x%x, 0x%x\n", in skx_get_all_bus_mappings()
302 edac_dbg(2, "Can't get tolm/tohm\n"); in skx_get_hi_lo()
327 edac_dbg(2, "tolm = 0x%llx tohm = 0x%llx\n", skx_tolm, skx_tohm); in skx_get_hi_lo()
341 edac_dbg(2, "bad %s = %d (raw=0x%x)\n", name, val, reg); in skx_get_dimm_attr()
380 …edac_dbg(0, "mc#%d: channel %d, dimm %d, %lld MiB (%d pages) bank: %d, rank: %d, row: 0x%x, col: 0… in skx_get_dimm_info()
446 edac_dbg(0, "mc#%d: channel %d, dimm %d, %llu MiB (%u pages)\n", in skx_get_nvdimm_info()
479 edac_dbg(0, "MC#%d: mci = %p\n", imc->mc, mci); in skx_register_mci()
[all …]

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