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Searched refs:edac_dbg (Results 1 – 25 of 27) sorted by relevance

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/linux/drivers/edac/
H A Dedac_pci_sysfs.c78 edac_dbg(0, "\n"); in edac_pci_instance_release()
162 edac_dbg(0, "\n"); in edac_pci_create_instance_kobj()
178 edac_dbg(2, "failed to register instance pci%d\n", idx); in edac_pci_create_instance_kobj()
184 edac_dbg(1, "Register instance 'pci%d' kobject\n", idx); in edac_pci_create_instance_kobj()
201 edac_dbg(0, "\n"); in edac_pci_unregister_sysfs_instance_kobj()
318 edac_dbg(0, "here to module_put(THIS_MODULE)\n"); in edac_pci_release_main_kobj()
344 edac_dbg(0, "\n"); in edac_pci_main_kobj_setup()
360 edac_dbg(1, "try_module_get() failed\n"); in edac_pci_main_kobj_setup()
366 edac_dbg(1, "Failed to allocate\n"); in edac_pci_main_kobj_setup()
380 edac_dbg(1, "Failed to register '.../edac/pci'\n"); in edac_pci_main_kobj_setup()
[all …]
H A Di3200_edac.c114 edac_dbg(0, "In single channel mode\n"); in how_many_channels()
117 edac_dbg(0, "In dual channel mode\n"); in how_many_channels()
122 edac_dbg(0, "2 DIMMS per channel disabled\n"); in how_many_channels()
124 edac_dbg(0, "2 DIMMS per channel enabled\n"); in how_many_channels()
300 edac_dbg(0, "drb[0][%d] = %d, drb[1][%d] = %d\n", i, drbs[0][i], i, drbs[1][i]); in i3200_get_drbs()
346 edac_dbg(0, "MC:\n"); in i3200_probe1()
367 edac_dbg(3, "MC: init mci\n"); in i3200_probe1()
401 edac_dbg(0, "csrow %d, channel %d%s, size = %ld MiB\n", i, j, in i3200_probe1()
416 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); in i3200_probe1()
421 edac_dbg(3, "MC: success\n"); in i3200_probe1()
[all …]
H A Dedac_device_sysfs.c206 edac_dbg(4, "control index=%d\n", edac_dev->dev_idx); in edac_device_ctrl_master_release()
235 edac_dbg(1, "\n"); in edac_device_register_sysfs_main_kobj()
262 edac_dbg(1, "Failed to register '.../edac/%s'\n", in edac_device_register_sysfs_main_kobj()
272 edac_dbg(4, "Registered '.../edac/%s' kobject\n", edac_dev->name); in edac_device_register_sysfs_main_kobj()
291 edac_dbg(0, "\n"); in edac_device_unregister_sysfs_main_kobj()
292 edac_dbg(4, "name of kobject is: %s\n", kobject_name(&dev->kobj)); in edac_device_unregister_sysfs_main_kobj()
329 edac_dbg(1, "\n"); in edac_device_ctrl_instance_release()
436 edac_dbg(1, "\n"); in edac_device_ctrl_block_release()
503 edac_dbg(4, "Instance '%s' inst_p=%p block '%s' block_p=%p\n", in edac_device_create_block()
505 edac_dbg(4, "block kobj=%p block kobj->parent=%p\n", in edac_device_create_block()
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H A Dr82600_edac.c237 edac_dbg(1, "Row=%d DRBA = %#0x\n", index, drbar); in r82600_init_csrows()
242 edac_dbg(1, "Row=%d, Boundary Address=%#0x, Last = %#0x\n", in r82600_init_csrows()
278 edac_dbg(0, "\n"); in r82600_probe1()
283 edac_dbg(2, "sdram refresh rate = %#0x\n", sdram_refresh_rate); in r82600_probe1()
284 edac_dbg(2, "DRAMC register = %#0x\n", dramcr); in r82600_probe1()
295 edac_dbg(0, "mci = %p\n", mci); in r82600_probe1()
311 edac_dbg(3, "mci = %p - Scrubbing disabled! EAP: %#0x\n", in r82600_probe1()
328 edac_dbg(3, "failed edac_mc_add_mc()\n"); in r82600_probe1()
335 edac_dbg(3, "Disabling Hardware Scrub (scrub on error)\n"); in r82600_probe1()
350 edac_dbg(3, "success\n"); in r82600_probe1()
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H A De7xxx_edac.c168 edac_dbg(3, "\n"); in e7xxx_find_channel()
188 edac_dbg(3, "\n"); in ctl_page_to_phys()
210 edac_dbg(3, "\n"); in process_ce()
227 edac_dbg(3, "\n"); in process_ce_no_info()
237 edac_dbg(3, "\n"); in process_ue()
250 edac_dbg(3, "\n"); in process_ue_no_info()
384 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in e7xxx_init_csrows()
430 edac_dbg(0, "mci\n"); in e7xxx_probe1()
453 edac_dbg(3, "init mci\n"); in e7xxx_probe1()
460 edac_dbg(3, "init pvt\n"); in e7xxx_probe1()
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H A Dedac_pci.c33 edac_dbg(1, "\n"); in edac_pci_alloc_ctl_info()
59 edac_dbg(1, "\n"); in edac_pci_free_ctl_info()
76 edac_dbg(1, "\n"); in find_edac_pci_by_dev()
101 edac_dbg(1, "\n"); in add_edac_pci_to_global_list()
170 edac_dbg(3, "checking\n"); in edac_pci_workq_function()
202 edac_dbg(0, "\n"); in edac_pci_add_device()
249 edac_dbg(0, "\n"); in edac_pci_del_device()
286 edac_dbg(4, "\n"); in edac_pci_generic_check()
321 edac_dbg(3, "failed edac_pci_add_device()\n"); in edac_pci_create_generic_ctl()
332 edac_dbg(0, "pci mod=%s\n", pci->mod_name); in edac_pci_release_generic_ctl()
H A Di82443bxgx_edac.c201 edac_dbg(1, "MC%d: Row=%d DRB = %#0x\n", in i82443bxgx_init_csrows()
205 edac_dbg(1, "MC%d: Row=%d, Boundary Address=%#0x, Last = %#0x\n", in i82443bxgx_init_csrows()
240 edac_dbg(0, "MC:\n"); in i82443bxgx_edacmc_probe1()
258 edac_dbg(0, "MC: mci = %p\n", mci); in i82443bxgx_edacmc_probe1()
274 edac_dbg(0, "Unknown/reserved DRAM type value in DRAMC register!\n"); in i82443bxgx_edacmc_probe1()
303 edac_dbg(0, "Unknown/reserved ECC state in NBXCFG register!\n"); in i82443bxgx_edacmc_probe1()
326 edac_dbg(3, "failed edac_mc_add_mc()\n"); in i82443bxgx_edacmc_probe1()
341 edac_dbg(3, "MC: success\n"); in i82443bxgx_edacmc_probe1()
355 edac_dbg(0, "MC:\n"); in i82443bxgx_edacmc_init_one()
370 edac_dbg(0, "\n"); in i82443bxgx_edacmc_remove_one()
[all …]
H A Di82860_edac.c168 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in i82860_init_csrows()
210 edac_dbg(3, "init mci\n"); in i82860_probe1()
228 edac_dbg(3, "failed edac_mc_add_mc()\n"); in i82860_probe1()
244 edac_dbg(3, "success\n"); in i82860_probe1()
259 edac_dbg(0, "\n"); in i82860_init_one()
277 edac_dbg(0, "\n"); in i82860_remove_one()
310 edac_dbg(3, "\n"); in i82860_init()
323 edac_dbg(0, "860 pci_get_device fail\n"); in i82860_init()
331 edac_dbg(0, "860 init fail\n"); in i82860_init()
349 edac_dbg(3, "\n"); in i82860_exit()
H A Di82975x_edac.c394 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in i82975x_init_csrows()
479 edac_dbg(0, "\n"); in i82975x_probe1()
483 edac_dbg(3, "failed, MCHBAR disabled!\n"); in i82975x_probe1()
489 edac_dbg(3, "error ioremapping MCHBAR!\n"); in i82975x_probe1()
552 edac_dbg(3, "init mci\n"); in i82975x_probe1()
562 edac_dbg(3, "init pvt\n"); in i82975x_probe1()
571 edac_dbg(3, "failed edac_mc_add_mc()\n"); in i82975x_probe1()
576 edac_dbg(3, "success\n"); in i82975x_probe1()
594 edac_dbg(0, "\n"); in i82975x_init_one()
612 edac_dbg(0, "\n"); in i82975x_remove_one()
[all …]
H A Di82875p_edac.c366 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in i82875p_init_csrows()
399 edac_dbg(0, "\n"); in i82875p_probe1()
418 edac_dbg(3, "init mci\n"); in i82875p_probe1()
428 edac_dbg(3, "init pvt\n"); in i82875p_probe1()
439 edac_dbg(3, "failed edac_mc_add_mc()\n"); in i82875p_probe1()
455 edac_dbg(3, "success\n"); in i82875p_probe1()
476 edac_dbg(0, "\n"); in i82875p_init_one()
495 edac_dbg(0, "\n"); in i82875p_remove_one()
541 edac_dbg(3, "\n"); in i82875p_init()
556 edac_dbg(0, "875p pci_get_device fail\n"); in i82875p_init()
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H A Dx38_edac.c106 edac_dbg(0, "In single channel mode\n"); in how_many_channel()
109 edac_dbg(0, "In dual channel mode\n"); in how_many_channel()
327 edac_dbg(0, "MC:\n"); in x38_probe1()
351 edac_dbg(3, "MC: init mci\n"); in x38_probe1()
400 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); in x38_probe1()
405 edac_dbg(3, "MC: success\n"); in x38_probe1()
420 edac_dbg(0, "MC:\n"); in x38_init_one()
436 edac_dbg(0, "\n"); in x38_remove_one()
469 edac_dbg(3, "MC:\n"); in x38_init()
483 edac_dbg(0, "x38 pci_get_device fail\n"); in x38_init()
[all …]
H A Die31200_edac.c226 edac_dbg(0, "In single channel mode\n"); in how_many_channels()
229 edac_dbg(0, "In dual channel mode\n"); in how_many_channels()
235 edac_dbg(0, "2 DIMMS per channel disabled\n"); in how_many_channels()
237 edac_dbg(0, "2 DIMMS per channel enabled\n"); in how_many_channels()
433 edac_dbg(0, "addr_decode: 0x%x\n", addr_decode); in ie31200_get_dimm_config()
437 edac_dbg(0, "mc: %d, channel: %d, dimm: %d, size: %lld MiB, ranks: %d, DRAM chip type: %d\n", in ie31200_get_dimm_config()
450 edac_dbg(0, "set nr pages: 0x%lx\n", nr_pages); in ie31200_get_dimm_config()
486 edac_dbg(3, "MC: init mci\n"); in ie31200_register_mci()
519 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); in ie31200_register_mci()
565 edac_dbg(0, "CPU %d: Machine Check %s: 0x%llx Bank %d: 0x%llx\n", in mce_handler()
[all …]
H A Dsb_edac.c708 edac_dbg(0, "Invalid number of ranks: %d (max = %i) raw value = %x (%04x)\n", in numrank()
721 edac_dbg(0, "Invalid number of rows: %d (should be between 14 and 17) raw value = %x (%04x)\n", in numrow()
734 edac_dbg(0, "Invalid number of cols: %d (max = 4) raw value = %x (%04x)\n", in numcol()
1382 edac_dbg(0, "edc route table for CHA %d: %s\n", in knl_get_dimm_capacity()
1385 edac_dbg(0, "edc route table for CHA %d-%d: %s\n", in knl_get_dimm_capacity()
1392 edac_dbg(0, "edc route table for CHA %d: %s\n", in knl_get_dimm_capacity()
1395 edac_dbg(0, "edc route table for CHA %d-%d: %s\n", in knl_get_dimm_capacity()
1407 edac_dbg(0, "mc route table for CHA %d: %s\n", in knl_get_dimm_capacity()
1410 edac_dbg(0, "mc route table for CHA %d-%d: %s\n", in knl_get_dimm_capacity()
1417 edac_dbg(0, "mc route table for CHA %d: %s\n", in knl_get_dimm_capacity()
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H A Di3000_edac.c322 edac_dbg(0, "MC:\n"); in i3000_probe1()
366 edac_dbg(3, "MC: init mci\n"); in i3000_probe1()
398 edac_dbg(3, "MC: (%d) cumul_size 0x%x\n", i, cumul_size); in i3000_probe1()
427 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); in i3000_probe1()
443 edac_dbg(3, "MC: success\n"); in i3000_probe1()
458 edac_dbg(0, "MC:\n"); in i3000_init_one()
474 edac_dbg(0, "\n"); in i3000_remove_one()
508 edac_dbg(3, "MC:\n"); in i3000_init()
522 edac_dbg(0, "i3000 pci_get_device fail\n"); in i3000_init()
529 edac_dbg(0, "i3000 init fail\n"); in i3000_init()
[all …]
H A Di7core_edac.c507 edac_dbg(0, "QPI %d control=0x%08x status=0x%08x dod=0x%08x map=0x%08x\n", in get_dimm_config()
512 edac_dbg(0, "ECC enabled with x%d SDCC\n", ECCx8(pvt) ? 8 : 4); in get_dimm_config()
518 edac_dbg(0, "ECC disabled\n"); in get_dimm_config()
523 edac_dbg(0, "DOD Max limits: DIMMS: %d, %d-ranked, %d-banked x%x x 0x%x\n", in get_dimm_config()
537 edac_dbg(0, "Channel %i is not active\n", i); in get_dimm_config()
541 edac_dbg(0, "Channel %i is disabled\n", i); in get_dimm_config()
572 edac_dbg(0, "Ch%d phy rd%d, wr%d (0x%08x): %s%s%s%cDIMMs\n", in get_dimm_config()
597 edac_dbg(0, "\tdimm %d %d MiB offset: %x, bank: %d, rank: %d, row: %#x, col: %#x\n", in get_dimm_config()
636 edac_dbg(1, "\t[%i] DIVBY3\tREMOVED\tOFFSET\n", i); in get_dimm_config()
638 edac_dbg(1, "\t\t%#x\t%#x\t%#x\n", in get_dimm_config()
[all …]
H A Damd76x_edac.c242 edac_dbg(0, "\n"); in amd76x_probe1()
257 edac_dbg(0, "mci = %p\n", mci); in amd76x_probe1()
276 edac_dbg(3, "failed edac_mc_add_mc()\n"); in amd76x_probe1()
292 edac_dbg(3, "success\n"); in amd76x_probe1()
304 edac_dbg(0, "\n"); in amd76x_init_one()
322 edac_dbg(0, "\n"); in amd76x_remove_one()
H A De752x_edac.c310 edac_dbg(3, "\n"); in ctl_page_to_phys()
336 edac_dbg(3, "\n"); in do_process_ce()
395 edac_dbg(3, "\n"); in do_process_ue()
454 edac_dbg(3, "\n"); in process_ue_no_info_wr()
1102 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in e752x_init_csrows()
1128 edac_dbg(3, "Initializing rank at (%i,%i)\n", index, i); in e752x_init_csrows()
1266 edac_dbg(0, "mci\n"); in e752x_probe1()
1267 edac_dbg(0, "Starting Probe1\n"); in e752x_probe1()
1297 edac_dbg(3, "init mci\n"); in e752x_probe1()
1306 edac_dbg(3, "init pvt\n"); in e752x_probe1()
[all …]
H A Dcpc925_edac.c306 edac_dbg(1, "start 0x%lx, size 0x%lx\n", start, size); in get_total_mem()
311 edac_dbg(0, "total_mem 0x%lx\n", pdata->total_mem); in get_total_mem()
501 edac_dbg(0, "ECC physical address 0x%lx\n", pa); in cpc925_mc_get_pfn()
825 edac_dbg(0, "Successfully added edac device for %s\n", in cpc925_add_edac_devices()
857 edac_dbg(0, "Successfully deleted edac device for %s\n", in cpc925_del_edac_devices()
873 edac_dbg(0, "Mem Scrub Ctrl Register 0x%x\n", mscr); in cpc925_get_sdram_scrub_rate()
901 edac_dbg(0, "%s channel\n", (dual > 0) ? "Dual" : "Single"); in cpc925_mc_get_channels()
916 edac_dbg(0, "%s platform device found!\n", pdev->name); in cpc925_probe()
997 edac_dbg(0, "success\n"); in cpc925_probe()
H A Dedac_mc.h73 #define edac_dbg(level, fmt, ...) \ macro
82 #define edac_dbg(level, fmt, ...) \ macro
H A Dmpc85xx_edac.c251 edac_dbg(3, "failed edac_pci_add_device()\n"); in mpc85xx_pci_err_probe()
290 edac_dbg(3, "success\n"); in mpc85xx_pci_err_probe()
308 edac_dbg(0, "\n"); in mpc85xx_pci_err_remove()
553 edac_dbg(3, "failed edac_device_add_device()\n"); in mpc85xx_l2_err_probe()
579 edac_dbg(3, "success\n"); in mpc85xx_l2_err_probe()
597 edac_dbg(0, "\n"); in mpc85xx_l2_err_remove()
H A Dedac_module.c151 edac_dbg(0, "\n"); in edac_exit()
H A Dversal_edac.c264 edac_dbg(2, "ERR DATA: 0x%08X%08X ERR DATA PARITY: 0x%08X\n", in get_ce_error_info()
274 edac_dbg(2, "ERR DATA: 0x%08X%08X ERR DATA PARITY: 0x%08X\n", in get_ce_error_info()
297 edac_dbg(2, "ERR DATA: 0x%08X%08X ERR DATA PARITY: 0x%08X\n", in get_ue_error_info()
306 edac_dbg(2, "ERR DATA: 0x%08X%08X ERR DATA PARITY: 0x%08X\n", in get_ue_error_info()
485 edac_dbg(3, "Total error count CE %d UE %d\n", in err_callback()
H A Dversalnet_edac.c242 edac_dbg(2, "ERR DATA: 0x%08X%08X PARITY: 0x%08X\n", in get_ddr_info()
253 edac_dbg(2, "ERR DATA: 0x%08X%08X PARITY: 0x%08X\n", in get_ddr_info()
467 edac_dbg(2, "memory_failure() error: %d", err); in handle_error()
469 edac_dbg(2, "Poison page at PA 0x%lx\n", pa); in handle_error()
H A Dsynopsys_edac.c393 edac_dbg(3, "CE bit position: %d data: %d\n", p->ceinfo.bitpos, in zynq_get_error_info()
472 edac_dbg(2, "ECCCSYN0: 0x%08X ECCCSYN1: 0x%08X ECCCSYN2: 0x%08X\n", in zynqmp_get_error_info()
629 edac_dbg(3, "Total error count CE %d UE %d\n", in intr_handler()
661 edac_dbg(3, "Total error count CE %d UE %d\n", in check_errors()
H A Ddmc520_edac.c496 edac_dbg(0, "Discovered %s, irq: %d.\n", dmc520_irq_configs[idx].name, irq); in dmc520_edac_probe()

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