Searched refs:ectl (Results 1 – 3 of 3) sorted by relevance
51 __u32 ectl : 1; member91 u32 ectl:1; member124 u32 ectl:1; member291 return scsw->tm.ectl; in scsw_ectl()293 return scsw->cmd.ectl; in scsw_ectl()
321 } ectl; member579 value |= soc->ectl.regs.rp_ectl_2_r1; in tegra_pcie_program_ectl_settings()584 value |= soc->ectl.regs.rp_ectl_4_r1 << in tegra_pcie_program_ectl_settings()590 value |= soc->ectl.regs.rp_ectl_5_r1; in tegra_pcie_program_ectl_settings()595 value |= soc->ectl.regs.rp_ectl_6_r1; in tegra_pcie_program_ectl_settings()600 value |= soc->ectl.regs.rp_ectl_2_r2; in tegra_pcie_program_ectl_settings()605 value |= soc->ectl.regs.rp_ectl_4_r2 << in tegra_pcie_program_ectl_settings()611 value |= soc->ectl.regs.rp_ectl_5_r2; in tegra_pcie_program_ectl_settings()616 value |= soc->ectl.regs.rp_ectl_6_r2; in tegra_pcie_program_ectl_settings()683 if (soc->ectl.enable) in tegra_pcie_port_enable()[all …]
416 u16 rc_mrrs, ep_mrrs, max_mrrs, ectl; in tune_pcie_caps() local423 ret = pcie_capability_read_word(dd->pcidev, PCI_EXP_DEVCTL, &ectl); in tune_pcie_caps()424 if ((!ret) && !(ectl & PCI_EXP_DEVCTL_EXT_TAG)) { in tune_pcie_caps()426 ectl |= PCI_EXP_DEVCTL_EXT_TAG; in tune_pcie_caps()428 PCI_EXP_DEVCTL, ectl); in tune_pcie_caps()