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Searched refs:dwb_pipe_inst (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_stream.c525 if (wb_info->dwb_pipe_inst >= MAX_DWB_PIPES) { in dc_stream_add_writeback()
534 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dc_stream_add_writeback()
542 stream->writeback_info[i].dwb_pipe_inst == wb_info->dwb_pipe_inst) { in dc_stream_add_writeback()
555 struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dc_stream_add_writeback()
567 struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dc_stream_add_writeback()
583 uint32_t dwb_pipe_inst) in dc_stream_fc_disable_writeback() argument
585 struct dwbc *dwb = dc->res_pool->dwbc[dwb_pipe_inst]; in dc_stream_fc_disable_writeback()
592 if (dwb_pipe_inst >= MAX_DWB_PIPES) { in dc_stream_fc_disable_writeback()
620 uint32_t dwb_pipe_inst) in dc_stream_remove_writeback() argument
628 if (dwb_pipe_inst >= MAX_DWB_PIPES) { in dc_stream_remove_writeback()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn20/
H A Ddcn20_optc.c244 uint32_t dwb_pipe_inst) in optc2_set_dwb_source() argument
248 if (dwb_pipe_inst == 0) in optc2_set_dwb_source()
251 else if (dwb_pipe_inst == 1) in optc2_set_dwb_source()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_hwseq.h120 unsigned int dwb_pipe_inst);
H A Ddcn20_hwseq.c2549 ASSERT(wb_info->dwb_pipe_inst < MAX_DWB_PIPES); in dcn20_enable_writeback()
2551 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dcn20_enable_writeback()
2552 mcif_wb = dc->res_pool->mcif_wb[wb_info->dwb_pipe_inst]; in dcn20_enable_writeback()
2556 optc->funcs->set_dwb_source(optc, wb_info->dwb_pipe_inst); in dcn20_enable_writeback()
2559 …config_mcif_arb(mcif_wb, &context->bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[wb_info->dwb_pipe_inst]); in dcn20_enable_writeback()
2569 unsigned int dwb_pipe_inst) in dcn20_disable_writeback() argument
2574 ASSERT(dwb_pipe_inst < MAX_DWB_PIPES); in dcn20_disable_writeback()
2575 dwb = dc->res_pool->dwbc[dwb_pipe_inst]; in dcn20_disable_writeback()
2576 mcif_wb = dc->res_pool->mcif_wb[dwb_pipe_inst]; in dcn20_disable_writeback()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c3222 ASSERT(wb_info->dwb_pipe_inst < dc->res_pool->res_cap->num_dwb); in dcn401_program_all_writeback_pipes_in_tree_sequence()
3223 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dcn401_program_all_writeback_pipes_in_tree_sequence()
3249 if (!wb_info->wb_enabled || wb_info->dwb_pipe_inst >= dc->res_pool->res_cap->num_dwb) in dcn401_enable_writeback_sequence()
3252 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dcn401_enable_writeback_sequence()
3253 mcif_wb = dc->res_pool->mcif_wb[wb_info->dwb_pipe_inst]; in dcn401_enable_writeback_sequence()
3262 …_arb(seq_state, mcif_wb, &context->bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[wb_info->dwb_pipe_inst]); in dcn401_enable_writeback_sequence()
3268 hwss_add_mpc_set_dwb_mux(seq_state, dc->res_pool->mpc, wb_info->dwb_pipe_inst, mpcc_inst); in dcn401_enable_writeback_sequence()
3282 if (wb_info->dwb_pipe_inst >= dc->res_pool->res_cap->num_dwb) in dcn401_disable_writeback_sequence()
3285 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dcn401_disable_writeback_sequence()
3286 mcif_wb = dc->res_pool->mcif_wb[wb_info->dwb_pipe_inst]; in dcn401_disable_writeback_sequence()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/
H A Dhw_sequencer.h1134 unsigned int dwb_pipe_inst);
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm.c10625 wb_info->dwb_pipe_inst = 0; in dm_set_writeback()