| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn321/ |
| H A D | dcn321_fpu.c | 119 .dtbclk_mhz = 1564.0,
335 if (max_clk_limit->dtbclk_mhz != 0) in override_max_clk_values()
336 curr_clk_limit->dtbclk_mhz = max_clk_limit->dtbclk_mhz; in override_max_clk_values()
377 if (bw_params->clk_table.entries[i].dtbclk_mhz > max_clk_data.dtbclk_mhz) in build_synthetic_soc_states()
378 max_clk_data.dtbclk_mhz = bw_params->clk_table.entries[i].dtbclk_mhz; in build_synthetic_soc_states()
410 if (!max_clk_data.dcfclk_mhz || !max_clk_data.dispclk_mhz || !max_clk_data.dtbclk_mhz) in build_synthetic_soc_states()
428 entry.dtbclk_mhz = max_clk_data.dtbclk_mhz; in build_synthetic_soc_states()
830 if (!bw_params->clk_table.entries[i].dtbclk_mhz) { in dcn321_update_bw_bounding_box_fpu()
831 dcn3_21_soc.clock_limits[i].dtbclk_mhz = dcn3_21_soc.clock_limits[i-1].dtbclk_mhz; in dcn321_update_bw_bounding_box_fpu()
833 dcn3_21_soc.clock_limits[i].dtbclk_mhz = bw_params->clk_table.entries[i].dtbclk_mhz; in dcn321_update_bw_bounding_box_fpu()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.c | 130 .dtbclk_mhz = 625.0,
139 .dtbclk_mhz = 625.0,
148 .dtbclk_mhz = 625.0,
157 .dtbclk_mhz = 625.0,
166 .dtbclk_mhz = 625.0,
374 .dtbclk_mhz = 625.0,
383 .dtbclk_mhz = 625.0,
392 .dtbclk_mhz = 625.0,
401 .dtbclk_mhz = 625.0,
410 .dtbclk_mhz = 625.0,
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| H A D | dcn315_clk_mgr.c | 263 .dtbclk_mhz = 600,
271 .dtbclk_mhz = 600,
279 .dtbclk_mhz = 600,
287 .dtbclk_mhz = 600,
295 .dtbclk_mhz = 600,
508 bw_params->clk_table.entries[i].dtbclk_mhz = bw_params->clk_table.entries[j].dtbclk_mhz; in dcn315_clk_mgr_helper_populate_bw_params()
558 if (!bw_params->clk_table.entries[i].dtbclk_mhz) in dcn315_clk_mgr_helper_populate_bw_params()
559 bw_params->clk_table.entries[i].dtbclk_mhz = def_max.dtbclk_mhz; in dcn315_clk_mgr_helper_populate_bw_params()
565 ASSERT(bw_params->clk_table.entries[i-1].dtbclk_mhz == def_max.dtbclk_mhz); in dcn315_clk_mgr_helper_populate_bw_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | dcn314_fpu.c | 111 .dtbclk_mhz = 600.0,
120 .dtbclk_mhz = 600.0,
129 .dtbclk_mhz = 600.0,
138 .dtbclk_mhz = 600.0,
147 .dtbclk_mhz = 600.0,
252 clock_limits[i].dtbclk_mhz = dcn3_14_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; in dcn314_update_bw_bounding_box_fpu()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn35/ |
| H A D | dcn35_fpu.c | 127 .dtbclk_mhz = 600.0,
136 .dtbclk_mhz = 600.0,
145 .dtbclk_mhz = 600.0,
154 .dtbclk_mhz = 600.0,
163 .dtbclk_mhz = 600.0,
305 clock_limits[i].dtbclk_mhz = in dcn35_update_bw_bounding_box_fpu()
306 dcn3_5_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; in dcn35_update_bw_bounding_box_fpu()
370 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dtbclk_mhz = in dcn35_update_bw_bounding_box_fpu()
371 clock_limits[i].dtbclk_mhz; in dcn35_update_bw_bounding_box_fpu()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn302/ |
| H A D | dcn302_fpu.c | 329 if (!bw_params->clk_table.entries[i].dtbclk_mhz && i > 0) in dcn302_fpu_update_bw_bounding_box()
330 dcn3_02_soc.clock_limits[i].dtbclk_mhz = dcn3_02_soc.clock_limits[i-1].dtbclk_mhz; in dcn302_fpu_update_bw_bounding_box()
332 dcn3_02_soc.clock_limits[i].dtbclk_mhz = bw_params->clk_table.entries[i].dtbclk_mhz; in dcn302_fpu_update_bw_bounding_box()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn303/ |
| H A D | dcn303_fpu.c | 335 if (!bw_params->clk_table.entries[i].dtbclk_mhz && i > 0) in dcn303_fpu_update_bw_bounding_box()
336 dcn3_03_soc.clock_limits[i].dtbclk_mhz = dcn3_03_soc.clock_limits[i-1].dtbclk_mhz; in dcn303_fpu_update_bw_bounding_box()
338 dcn3_03_soc.clock_limits[i].dtbclk_mhz = bw_params->clk_table.entries[i].dtbclk_mhz; in dcn303_fpu_update_bw_bounding_box()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/ |
| H A D | dml2_policy.c | 151 if (p->in_states->state_array[i].dtbclk_mhz > max_dtbclk_mhz) in dml2_policy_build_synthetic_soc_states()
152 max_dtbclk_mhz = (int)p->in_states->state_array[i].dtbclk_mhz; in dml2_policy_build_synthetic_soc_states()
169 s->entry.dtbclk_mhz = max_dtbclk_mhz; in dml2_policy_build_synthetic_soc_states()
174 s->entry.dtbclk_mhz = max_dtbclk_mhz; in dml2_policy_build_synthetic_soc_states()
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| H A D | dml2_translation_helper.c | 362 p->in_states->state_array[0].dtbclk_mhz = 1564.0; in dml2_init_soc_states()
398 p->in_states->state_array[0].dtbclk_mhz = 1564.0; in dml2_init_soc_states()
433 p->in_states->state_array[0].dtbclk_mhz = 2000; //1564.0; in dml2_init_soc_states()
543 if (dml2->config.bbox_overrides.clks_table.clk_entries[i].dtbclk_mhz > 0) in dml2_init_soc_states()
544 p->in_states->state_array[i].dtbclk_mhz = in dml2_init_soc_states()
545 dml2->config.bbox_overrides.clks_table.clk_entries[i].dtbclk_mhz; in dml2_init_soc_states()
679 out->state_array[i].dtbclk_mhz = dc->dml.soc.clock_limits[i].dtbclk_mhz; in dml2_translate_soc_states()
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| H A D | dml2_wrapper.h | 159 unsigned int dtbclk_mhz; member
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| H A D | dml2_wrapper.c | 582 …_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dtbclk_mhz * 1000; in dml2_validate_and_build_resource()
640 …_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dtbclk_mhz * 1000; in dml2_validate_and_build_resource()
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| H A D | display_mode_util.c | 628 dml_print("DML: state_bbox: dtbclk_mhz = %f\n", state->dtbclk_mhz); in dml_print_soc_state_bounding_box()
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| H A D | display_mode_core_structs.h | 272 dml_float_t dtbclk_mhz; member
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 140 .dtbclk_mhz = 1564.0,
2683 if (bw_params->clk_table.entries[i].dtbclk_mhz > max_dtbclk_mhz) in dcn32_patch_dpm_table()
2684 max_dtbclk_mhz = bw_params->clk_table.entries[i].dtbclk_mhz; in dcn32_patch_dpm_table()
2698 bw_params->clk_table.entries[0].dtbclk_mhz = dcn3_2_soc.clock_limits[0].dtbclk_mhz; in dcn32_patch_dpm_table()
2787 if (max_clk_limit->dtbclk_mhz != 0) in override_max_clk_values()
2788 curr_clk_limit->dtbclk_mhz = max_clk_limit->dtbclk_mhz; in override_max_clk_values()
2829 if (bw_params->clk_table.entries[i].dtbclk_mhz > max_clk_data.dtbclk_mhz) in build_synthetic_soc_states()
2830 max_clk_data.dtbclk_mhz = bw_params->clk_table.entries[i].dtbclk_mhz; in build_synthetic_soc_states()
2862 if (!max_clk_data.dcfclk_mhz || !max_clk_data.dispclk_mhz || !max_clk_data.dtbclk_mhz) in build_synthetic_soc_states()
2880 entry.dtbclk_mhz = max_clk_data.dtbclk_mhz; in build_synthetic_soc_states()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn401/ |
| H A D | dcn401_fpu.c | 224 if (dc->clk_mgr->bw_params->clk_table.entries[i].dtbclk_mhz) in dcn401_update_bw_bounding_box_fpu()
225 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dtbclk_mhz = in dcn401_update_bw_bounding_box_fpu()
226 dc->clk_mgr->bw_params->clk_table.entries[i].dtbclk_mhz; in dcn401_update_bw_bounding_box_fpu()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_clk_mgr.c | 869 bw_params->clk_table.entries[i].dtbclk_mhz = bw_params->clk_table.entries[j].dtbclk_mhz; in dcn35_clk_mgr_helper_populate_bw_params()
917 bw_params->clk_table.entries[i].dtbclk_mhz = def_max.dtbclk_mhz; in dcn35_clk_mgr_helper_populate_bw_params()
949 if (!bw_params->clk_table.entries[i].dtbclk_mhz) in dcn35_clk_mgr_helper_populate_bw_params()
950 bw_params->clk_table.entries[i].dtbclk_mhz = def_max.dtbclk_mhz; in dcn35_clk_mgr_helper_populate_bw_params()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
| H A D | dcn401_clk_mgr.c | 257 &clk_mgr_base->bw_params->clk_table.entries[0].dtbclk_mhz, in dcn401_init_clocks()
259 …clk_mgr_base->bw_params->dc_mode_limit.dtbclk_mhz = dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, PP… in dcn401_init_clocks()
260 if (num_entries_per_clk->num_dtbclk_levels && clk_mgr_base->bw_params->dc_mode_limit.dtbclk_mhz == in dcn401_init_clocks()
261 … clk_mgr_base->bw_params->clk_table.entries[num_entries_per_clk->num_dtbclk_levels - 1].dtbclk_mhz) in dcn401_init_clocks()
262 clk_mgr_base->bw_params->dc_mode_limit.dtbclk_mhz = 0; in dcn401_init_clocks()
772 new_clocks->ref_dtbclk_khz = clk_mgr_base->bw_params->clk_table.entries[0].dtbclk_mhz * 1000; in dcn401_update_clocks_legacy()
1257 new_clocks->ref_dtbclk_khz = clk_mgr_base->bw_params->clk_table.entries[0].dtbclk_mhz * 1000; in dcn401_build_update_display_clocks_sequence()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| H A D | dcn301_fpu.c | 361 s[i].dtbclk_mhz = dcn3_01_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; in dcn301_fpu_update_bw_bounding_box()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | clk_mgr.h | 110 unsigned int dtbclk_mhz; member
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| H A D | dcn32_clk_mgr.c | 205 &clk_mgr_base->bw_params->clk_table.entries[0].dtbclk_mhz, in dcn32_init_clocks()
207 clk_mgr_base->bw_params->dc_mode_limit.dtbclk_mhz = in dcn32_init_clocks()
798 new_clocks->ref_dtbclk_khz = clk_mgr_base->bw_params->clk_table.entries[0].dtbclk_mhz * 1000; in dcn32_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_structs.h | 169 double dtbclk_mhz; member
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| H A D | display_mode_vba.c | 406 mode_lib->vba.DTBCLKPerState[i] = soc->clock_limits[i].dtbclk_mhz; in fetch_socbb_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | dcn30_fpu.c | 666 dcn3_0_soc.clock_limits[i].dtbclk_mhz = dcn3_0_soc.clock_limits[0].dtbclk_mhz; in dcn30_fpu_update_bw_bounding_box()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| H A D | dcn30_clk_mgr.c | 139 &clk_mgr_base->bw_params->clk_table.entries[0].dtbclk_mhz, in dcn3_init_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 2391 low_pstate_lvl.dtbclk_mhz = dcn2_1_soc.clock_limits[high_voltage_lvl].dtbclk_mhz; in construct_low_pstate_lvl()
2445 s[k].dtbclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; in dcn21_update_bw_bounding_box()
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