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Searched refs:dst_y_per_vm_flip (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddml_display_rq_dlg_calc.c228 dml_float_t dst_y_per_vm_flip; in dml_rq_dlg_get_dlg_reg() local
343 dst_y_per_vm_flip = dml_get_dst_y_per_vm_flip(mode_lib, pipe_idx); in dml_rq_dlg_get_dlg_reg()
353 dml_print("DML_DLG: %s: dst_y_per_vm_flip = %3.2f\n", __func__, dst_y_per_vm_flip); in dml_rq_dlg_get_dlg_reg()
419 disp_dlg_regs->dst_y_per_vm_flip = (dml_uint_t)(dst_y_per_vm_flip * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_reg()
427 …L_DLG: %s: disp_dlg_regs->dst_y_per_vm_flip = 0x%x\n", __func__, disp_dlg_regs->dst_y_per_vm_flip); in dml_rq_dlg_get_dlg_reg()
H A Ddml2_translation_helper.c1480 out->dlg_regs.dst_y_per_vm_flip = disp_dlg_regs->dst_y_per_vm_flip; in dml2_update_pipe_ctx_dchub_regs()
H A Ddisplay_mode_core_structs.h1940 dml_uint_t dst_y_per_vm_flip; member
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn6_calcs_dchub.c540 double *dst_y_per_vm_flip, in dcn6_calculate_flip_schedule()
639 *dst_y_per_vm_flip = math_ceil2(4.0 * (l->Tvm_flip / LineTime), 1.0) / 4.0; in dcn6_calculate_flip_schedule()
642 *final_flip_bw = math_max2(vm_bytes * HostVMInefficiencyFactor / (*dst_y_per_vm_flip * LineTime), in dcn6_calculate_flip_schedule()
645 …if (*dst_y_per_vm_flip >= 32 || *dst_y_per_row_flip >= 16 || l->Tvm_flip + 2 * l->Tr0_flip > l->mi… in dcn6_calculate_flip_schedule()
653 *dst_y_per_vm_flip = 0; in dcn6_calculate_flip_schedule()
661 *dst_y_per_vm_flip = 0; in dcn6_calculate_flip_schedule()
667 …DML_LOG_VERBOSE("DML::%s: dst_y_per_vm_flip = %f (should be < 32)\n", __func__, *dst_y_per_vm_flip… in dcn6_calculate_flip_schedule()
797 l->dst_y_per_vm_flip = mode_lib->mp.dst_y_per_vm_flip[mode_lib->mp.pipe_plane[pipe_idx]]; in dcn6_rq_dlg_get_dlg_reg()
801 DML_LOG_VERBOSE("DML_DLG: %s: dst_y_per_vm_flip = %3.2f\n", __func__, l->dst_y_per_vm_flip); in dcn6_rq_dlg_get_dlg_reg()
865 disp_dlg_regs->dst_y_per_vm_flip = (unsigned int)(l->dst_y_per_vm_flip * math_pow(2, 2)); in dcn6_rq_dlg_get_dlg_reg()
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H A Ddml2_core_dcn5_calcs_dchub.c4012 double *dst_y_per_vm_flip, in dcn5_calculate_flip_schedule()
4114 *dst_y_per_vm_flip = 1; // not used in dcn5_calculate_flip_schedule()
4140 *dst_y_per_vm_flip = math_ceil2(4.0 * (l->Tvm_flip / LineTime), 1.0) / 4.0; in dcn5_calculate_flip_schedule()
4143 … *final_flip_bw = math_max2(vm_bytes * HostVMInefficiencyFactor / (*dst_y_per_vm_flip * LineTime), in dcn5_calculate_flip_schedule()
4146 …if (*dst_y_per_vm_flip >= 32 || *dst_y_per_row_flip >= 16 || l->Tvm_flip + 2 * l->Tr0_flip > l->mi… in dcn5_calculate_flip_schedule()
4154 *dst_y_per_vm_flip = 0; in dcn5_calculate_flip_schedule()
4163 *dst_y_per_vm_flip = 0; in dcn5_calculate_flip_schedule()
4170 …ML_LOG_VERBOSE("DML::%s: dst_y_per_vm_flip = %f (should be < 32)\n", __func__, *dst_y_per_vm_flip); in dcn5_calculate_flip_schedule()
4833 double dst_y_per_vm_flip[], in dcn5_calculate_vm_group_and_request_times() argument
4924 TimePerVMGroupFlip[k] = dst_y_per_vm_flip[k] * line_time / num_group_per_lower_vm_stage_flip; in dcn5_calculate_vm_group_and_request_times()
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H A Ddml2_core_shared_types.h480 double dst_y_per_vm_flip[DML2_MAX_PLANES]; member
982 double dst_y_per_vm_flip[DML2_MAX_PLANES]; member
1696 double dst_y_per_vm_flip; member
H A Ddml2_core_dcn5_funcs_mode_programming.c953 &mode_lib->mp.dst_y_per_vm_flip[k], in dcn5_mode_programming()
1239 mode_lib->mp.dst_y_per_vm_flip, in dcn5_mode_programming()
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_structs.h631 unsigned int dst_y_per_vm_flip; member
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc.c7692 state->hubp[i].dst_y_per_vm_flip = pipe_ctx->dlg_regs.dst_y_per_vm_flip; in dc_capture_register_software_state()