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Searched refs:dst_y_per_row_vblank (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddml_display_rq_dlg_calc.c227 dml_float_t dst_y_per_row_vblank; in dml_rq_dlg_get_dlg_reg() local
342 dst_y_per_row_vblank = dml_get_dst_y_per_row_vblank(mode_lib, pipe_idx); in dml_rq_dlg_get_dlg_reg()
356 dml_print("DML_DLG: %s: dst_y_per_row_vblank = %3.2f\n", __func__, dst_y_per_row_vblank); in dml_rq_dlg_get_dlg_reg()
359 ASSERT(dst_y_per_row_vblank < max_dst_y_per_row_vblank); in dml_rq_dlg_get_dlg_reg()
360 ASSERT(dst_y_prefetch > (dst_y_per_vm_vblank + dst_y_per_row_vblank)); in dml_rq_dlg_get_dlg_reg()
418 disp_dlg_regs->dst_y_per_row_vblank = (dml_uint_t)(dst_y_per_row_vblank * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_reg()
426 … %s: disp_dlg_regs->dst_y_per_row_vblank = 0x%x\n", __func__, disp_dlg_regs->dst_y_per_row_vblank); in dml_rq_dlg_get_dlg_reg()
H A Ddml2_translation_helper.c1479 out->dlg_regs.dst_y_per_row_vblank = disp_dlg_regs->dst_y_per_row_vblank; in dml2_update_pipe_ctx_dchub_regs()
H A Ddisplay_mode_core_structs.h1939 dml_uint_t dst_y_per_row_vblank; member
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn6_calcs_dchub.c151 double dst_y_per_row_vblank = p->dst_y_per_row_vblank[plane_idx]; in compute_pre_rec_first_hdl() local
160 …pre_first_hdl = prefetch_start_line + dst_y_per_vm_vblank + 2.0 * dst_y_per_row_vblank + in.prefet… in compute_pre_rec_first_hdl()
796 l->dst_y_per_row_vblank = mode_lib->mp.dst_y_per_row_vblank[mode_lib->mp.pipe_plane[pipe_idx]]; in dcn6_rq_dlg_get_dlg_reg()
804 DML_LOG_VERBOSE("DML_DLG: %s: dst_y_per_row_vblank = %3.2f\n", __func__, l->dst_y_per_row_vblank); in dcn6_rq_dlg_get_dlg_reg()
806 if (l->dst_y_prefetch > 0 && l->dst_y_per_vm_vblank > 0 && l->dst_y_per_row_vblank > 0) { in dcn6_rq_dlg_get_dlg_reg()
807 DML_ASSERT(l->dst_y_prefetch > (l->dst_y_per_vm_vblank + l->dst_y_per_row_vblank)); in dcn6_rq_dlg_get_dlg_reg()
864 disp_dlg_regs->dst_y_per_row_vblank = (unsigned int)(l->dst_y_per_row_vblank * math_pow(2, 2)); in dcn6_rq_dlg_get_dlg_reg()
872 … %s: disp_dlg_regs->dst_y_per_row_vblank = 0x%x\n", __func__, disp_dlg_regs->dst_y_per_row_vblank); in dcn6_rq_dlg_get_dlg_reg()
H A Ddml2_core_shared_types.h981 double dst_y_per_row_vblank[DML2_MAX_PLANES]; member
1695 double dst_y_per_row_vblank; member
1742 double *dst_y_per_row_vblank; member
2056 double *dst_y_per_row_vblank; member
2312 double *dst_y_per_row_vblank; member
H A Ddml2_core_dcn5_calcs_dchub.c3073 *p->dst_y_per_row_vblank = 0; in dcn5_calculate_prefetch_schedule()
3274 …*p->dst_y_per_row_vblank = math_ceil2(4.0 * s->TimeForFetchingRowInVBlank / s->LineTime, 1.0) / 4.… in dcn5_calculate_prefetch_schedule()
3276 …estPrefetchPixelData = *p->dst_y_prefetch - *p->dst_y_per_vm_vblank - 2 * *p->dst_y_per_row_vblank; in dcn5_calculate_prefetch_schedule()
3286 DML_LOG_VERBOSE("DML::%s: dst_y_per_row_vblank = %f\n", __func__, *p->dst_y_per_row_vblank); in dcn5_calculate_prefetch_schedule()
3371 *p->dst_y_per_row_vblank = 0; in dcn5_calculate_prefetch_schedule()
3399 } else if (*p->dst_y_per_row_vblank > 0) { in dcn5_calculate_prefetch_schedule()
3400 …tesPerRow * p->HostVMInefficiencyFactor + tdlut_row_bytes) / (*p->dst_y_per_row_vblank * s->LineTi… in dcn5_calculate_prefetch_schedule()
3403 DML_LOG_VERBOSE("DML::%s: dst_y_per_row_vblank = %f\n", __func__, *p->dst_y_per_row_vblank); in dcn5_calculate_prefetch_schedule()
3408 …time to prefetch!. dst_y_per_row_vblank=%f (should be > 0)\n", __func__, *p->dst_y_per_row_vblank); in dcn5_calculate_prefetch_schedule()
3418 *p->dst_y_per_row_vblank = 0; in dcn5_calculate_prefetch_schedule()
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H A Ddml2_core_dcn5_funcs_mode_programming.c720 CalculatePrefetchSchedule_params->dst_y_per_row_vblank = &mode_lib->mp.dst_y_per_row_vblank[k]; in dcn5_mode_programming()
1185 CalculateMetaAndPTETimes_params->dst_y_per_row_vblank = mode_lib->mp.dst_y_per_row_vblank; in dcn5_mode_programming()
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_structs.h630 unsigned int dst_y_per_row_vblank; member
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc.c7691 state->hubp[i].dst_y_per_row_vblank = pipe_ctx->dlg_regs.dst_y_per_row_vblank; in dc_capture_register_software_state()