/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
H A D | display_rq_dlg_calc_32.c | 251 double dst_y_per_meta_row_nom_l; in dml32_rq_dlg_get_dlg_reg() local 474 …dst_y_per_meta_row_nom_l = get_dst_y_per_meta_row_nom_l(mode_lib, e2e_pipe_param, num_pipes, pipe_… in dml32_rq_dlg_get_dlg_reg() 506 dlg_regs->dst_y_per_meta_row_nom_l = dst_y_per_meta_row_nom_l * dml_pow(2, 2); in dml32_rq_dlg_get_dlg_reg() 581 ASSERT(dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int)dml_pow(2, 17)); in dml32_rq_dlg_get_dlg_reg()
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/linux/drivers/gpu/drm/amd/display/dc/dml2/ |
H A D | dml_display_rq_dlg_calc.c | 250 dml_float_t dst_y_per_meta_row_nom_l; in dml_rq_dlg_get_dlg_reg() local 449 dst_y_per_meta_row_nom_l = dml_get_dst_y_per_meta_row_nom_l(mode_lib, pipe_idx); in dml_rq_dlg_get_dlg_reg() 468 disp_dlg_regs->dst_y_per_meta_row_nom_l = (dml_uint_t)(dst_y_per_meta_row_nom_l * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_reg() 541 ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_l < (dml_uint_t)dml_pow(2, 17)); in dml_rq_dlg_get_dlg_reg()
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H A D | display_mode_core.h | 140 dml_get_per_surface_var_decl(dst_y_per_meta_row_nom_l, dml_float_t);
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H A D | dml2_translation_helper.c | 1461 out->dlg_regs.dst_y_per_meta_row_nom_l = disp_dlg_regs->dst_y_per_meta_row_nom_l; in dml2_update_pipe_ctx_dchub_regs()
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H A D | display_mode_util.c | 279 dml_print("DML: dst_y_per_meta_row_nom_l = 0x%x\n", dlg_regs->dst_y_per_meta_row_nom_l); in dml_print_dlg_regs_st()
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H A D | display_mode_core_structs.h | 1899 dml_uint_t dst_y_per_meta_row_nom_l; member
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/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn21/ |
H A D | dcn21_hubp.c | 402 DST_Y_PER_META_ROW_NOM_L, &dlg_attr.dst_y_per_meta_row_nom_l); in hubp21_validate_dml_output() 437 if (dlg_attr.dst_y_per_meta_row_nom_l != dml_dlg_attr->dst_y_per_meta_row_nom_l) in hubp21_validate_dml_output() 439 dml_dlg_attr->dst_y_per_meta_row_nom_l, dlg_attr.dst_y_per_meta_row_nom_l); in hubp21_validate_dml_output()
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/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn20/ |
H A D | dcn20_hubp.c | 119 DST_Y_PER_META_ROW_NOM_L, dlg_attr->dst_y_per_meta_row_nom_l); in hubp2_program_deadline() 1185 DST_Y_PER_META_ROW_NOM_L, &dlg_attr->dst_y_per_meta_row_nom_l); in hubp2_read_state_common() 1495 DST_Y_PER_META_ROW_NOM_L, &dlg_attr.dst_y_per_meta_row_nom_l); in hubp2_validate_dml_output() 1530 if (dlg_attr.dst_y_per_meta_row_nom_l != dml_dlg_attr->dst_y_per_meta_row_nom_l) in hubp2_validate_dml_output() 1532 dml_dlg_attr->dst_y_per_meta_row_nom_l, dlg_attr.dst_y_per_meta_row_nom_l); in hubp2_validate_dml_output()
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/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/ |
H A D | dml_top_dchub_registers.h | 55 uint32_t dst_y_per_meta_row_nom_l; member
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/linux/drivers/gpu/drm/amd/display/dc/dml/ |
H A D | display_rq_dlg_helpers.c | 275 dlg_regs->dst_y_per_meta_row_nom_l); in print__dlg_regs_st()
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H A D | display_mode_structs.h | 649 unsigned int dst_y_per_meta_row_nom_l; member
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H A D | dml1_display_rq_dlg_calc.c | 1567 disp_dlg_regs->dst_y_per_meta_row_nom_l = (unsigned int) ((double) meta_row_height_l in dml1_rq_dlg_get_dlg_params() 1569 ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int) dml_pow(2, 17)); in dml1_rq_dlg_get_dlg_params() 1571 …disp_dlg_regs->dst_y_per_meta_row_nom_c = disp_dlg_regs->dst_y_per_meta_row_nom_l; /* dcc for 4:2:… in dml1_rq_dlg_get_dlg_params()
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H A D | display_mode_vba.h | 93 dml_get_pipe_attr_decl(dst_y_per_meta_row_nom_l);
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H A D | display_mode_vba.c | 186 dml_get_pipe_attr_func(dst_y_per_meta_row_nom_l, mode_lib->vba.DST_Y_PER_META_ROW_NOM_L);
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
H A D | display_rq_dlg_calc_21.c | 1545 disp_dlg_regs->dst_y_per_meta_row_nom_l = (unsigned int) ((double) meta_row_height_l in dml_rq_dlg_get_dlg_params() 1547 ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int)dml_pow(2, 17)); in dml_rq_dlg_get_dlg_params() 1549 …disp_dlg_regs->dst_y_per_meta_row_nom_c = disp_dlg_regs->dst_y_per_meta_row_nom_l; // TODO: dcc fo… in dml_rq_dlg_get_dlg_params()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
H A D | display_rq_dlg_calc_20.c | 1441 disp_dlg_regs->dst_y_per_meta_row_nom_l = (unsigned int) ((double) meta_row_height_l in dml20_rq_dlg_get_dlg_params() 1443 ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int) dml_pow(2, 17)); in dml20_rq_dlg_get_dlg_params() 1445 …disp_dlg_regs->dst_y_per_meta_row_nom_c = disp_dlg_regs->dst_y_per_meta_row_nom_l; // TODO: dcc fo… in dml20_rq_dlg_get_dlg_params()
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H A D | display_rq_dlg_calc_20v2.c | 1442 disp_dlg_regs->dst_y_per_meta_row_nom_l = (unsigned int) ((double) meta_row_height_l in dml20v2_rq_dlg_get_dlg_params() 1444 ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int) dml_pow(2, 17)); in dml20v2_rq_dlg_get_dlg_params() 1446 …disp_dlg_regs->dst_y_per_meta_row_nom_c = disp_dlg_regs->dst_y_per_meta_row_nom_l; // TODO: dcc fo… in dml20v2_rq_dlg_get_dlg_params()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
H A D | display_rq_dlg_calc_30.c | 1635 disp_dlg_regs->dst_y_per_meta_row_nom_l = (unsigned int)((double)meta_row_height_l in dml_rq_dlg_get_dlg_params() 1637 ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int)dml_pow(2, 17)); in dml_rq_dlg_get_dlg_params() 1639 …disp_dlg_regs->dst_y_per_meta_row_nom_c = disp_dlg_regs->dst_y_per_meta_row_nom_l; // TODO: dcc fo… in dml_rq_dlg_get_dlg_params()
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/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn401/ |
H A D | dcn401_hubp.c | 238 DST_Y_PER_META_ROW_NOM_L, dlg_attr->dst_y_per_meta_row_nom_l); in hubp401_program_deadline() 836 DST_Y_PER_META_ROW_NOM_L, &dlg_attr->dst_y_per_meta_row_nom_l); in hubp401_read_state()
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/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn10/ |
H A D | dcn10_hubp.c | 624 DST_Y_PER_META_ROW_NOM_L, dlg_attr->dst_y_per_meta_row_nom_l); in hubp1_program_deadline() 950 DST_Y_PER_META_ROW_NOM_L, &dlg_attr->dst_y_per_meta_row_nom_l); in hubp1_read_state_common()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
H A D | display_rq_dlg_calc_31.c | 1474 …disp_dlg_regs->dst_y_per_meta_row_nom_l = (unsigned int) ((double) meta_row_height_l / (double) vr… in dml_rq_dlg_get_dlg_params() 1475 ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int)dml_pow(2, 17)); in dml_rq_dlg_get_dlg_params()
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/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
H A D | dcn10_hw_sequencer_debug.c | 271 dlg_regs->refcyc_per_pte_group_nom_c, dlg_regs->dst_y_per_meta_row_nom_l, in dcn10_get_dlg_states()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
H A D | display_rq_dlg_calc_314.c | 1562 …disp_dlg_regs->dst_y_per_meta_row_nom_l = (unsigned int) ((double) meta_row_height_l / (double) vr… in dml_rq_dlg_get_dlg_params() 1563 ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int)dml_pow(2, 17)); in dml_rq_dlg_get_dlg_params()
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/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
H A D | dml2_core_shared_types.h | 1446 double dst_y_per_meta_row_nom_l; member
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/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
H A D | dcn10_hwseq.c | 256 dlg_regs->refcyc_per_pte_group_nom_c, dlg_regs->dst_y_per_meta_row_nom_l, in dcn10_log_hubp_states()
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