| /linux/drivers/media/platform/ti/vpe/ |
| H A D | sc.c | 62 unsigned int dst_w) in sc_set_hs_coeffs() argument
70 if (dst_w > src_w) { in sc_set_hs_coeffs()
73 if ((dst_w << 1) < src_w) in sc_set_hs_coeffs()
74 dst_w <<= 1; /* first level decimation */ in sc_set_hs_coeffs()
75 if ((dst_w << 1) < src_w) in sc_set_hs_coeffs()
76 dst_w <<= 1; /* second level decimation */ in sc_set_hs_coeffs()
78 if (dst_w == src_w) { in sc_set_hs_coeffs()
81 sixteenths = (dst_w << 4) / src_w; in sc_set_hs_coeffs()
149 unsigned int dst_w, unsigned int dst_h) in sc_config_scaler() argument
178 if (src_w == dst_w && src_h == dst_h) { in sc_config_scaler()
[all …]
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| H A D | sc.h | 200 unsigned int dst_w);
205 unsigned int dst_w, unsigned int dst_h);
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| /linux/drivers/gpu/drm/sti/ |
| H A D | sti_vid.c | 146 int dst_w = clamp_val(state->crtc_w, 0, mode->hdisplay - dst_x); in sti_vid_commit() local
153 dst_w = ALIGN(dst_w, 2); in sti_vid_commit()
164 xds = sti_vtg_get_pixel_number(*mode, dst_x + dst_w - 1); in sti_vid_commit()
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| /linux/drivers/gpu/drm/ |
| H A D | drm_rect.c | 173 int dst_w = drm_rect_width(dst); in drm_rect_calc_hscale() local
174 int hscale = drm_calc_scale(src_w, dst_w); in drm_rect_calc_hscale()
176 if (hscale < 0 || dst_w == 0) in drm_rect_calc_hscale()
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| /linux/drivers/media/platform/st/sti/bdisp/ |
| H A D | bdisp-hw.c | 630 u32 src_w, src_h, dst_w, dst_h; in bdisp_hw_get_hv_inc() local
634 dst_w = ctx->dst.crop.width; in bdisp_hw_get_hv_inc()
637 if (bdisp_hw_get_inc(src_w, dst_w, h_inc) || in bdisp_hw_get_hv_inc()
641 src_w, src_h, dst_w, dst_h); in bdisp_hw_get_hv_inc()
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| /linux/drivers/gpu/drm/tegra/ |
| H A D | plane.c | 228 unsigned int i, bpp, dst_w, dst_h, src_w, src_h, mul; in tegra_plane_calculate_memory_bandwidth() local
243 dst_w = drm_rect_width(&state->dst); in tegra_plane_calculate_memory_bandwidth()
270 avg_bandwidth = min(src_w, dst_w) * min(src_h, dst_h); in tegra_plane_calculate_memory_bandwidth()
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| /linux/drivers/gpu/drm/exynos/ |
| H A D | exynos_drm_gsc.c | 748 u32 src_w, src_h, dst_w, dst_h; in gsc_set_prescaler() local
755 dst_w = dst->h; in gsc_set_prescaler()
758 dst_w = dst->w; in gsc_set_prescaler()
762 ret = gsc_get_ratio_shift(ctx, src_w, dst_w, &sc->pre_hratio); in gsc_set_prescaler()
777 sc->main_hratio = (src_w << 16) / dst_w; in gsc_set_prescaler()
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| H A D | exynos_drm_fimc.c | 744 u32 src_w, src_h, dst_w, dst_h; in fimc_set_prescaler() local
756 dst_w = dst->h; in fimc_set_prescaler()
759 dst_w = dst->w; in fimc_set_prescaler()
764 hfactor = fls(src_w / dst_w / 2); in fimc_set_prescaler()
783 sc->hratio = (src_w << 14) / (dst_w << hfactor); in fimc_set_prescaler()
785 sc->up_h = (dst_w >= src_w); in fimc_set_prescaler()
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_plane.c | 207 unsigned int src_w, src_h, dst_w, dst_h; in intel_adjusted_rate() local
211 dst_w = drm_rect_width(dst); in intel_adjusted_rate()
215 dst_w = min(src_w, dst_w); in intel_adjusted_rate()
219 dst_w * dst_h); in intel_adjusted_rate()
459 int dst_w = drm_rect_width(&plane_state->uapi.dst); in intel_plane_is_scaled() local
462 return src_w != dst_w || src_h != dst_h; in intel_plane_is_scaled()
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| /linux/drivers/gpu/drm/rockchip/ |
| H A D | rockchip_drm_vop2.c | 562 u32 src_w, u32 src_h, u32 dst_w, in vop2_setup_scale() argument
584 hor_scl_mode = scl_get_scl_mode(src_w, dst_w); in vop2_setup_scale()
602 if ((hor_scl_mode == SCALE_DOWN) && (dst_w & 0x1)) { in vop2_setup_scale()
604 win->data->name, dst_w); in vop2_setup_scale()
605 dst_w++; in vop2_setup_scale()
609 val = vop2_scale_factor(src_w, dst_w); in vop2_setup_scale()
641 hor_scl_mode = scl_get_scl_mode(cbcr_src_w, dst_w); in vop2_setup_scale()
644 val = vop2_scale_factor(cbcr_src_w, dst_w); in vop2_setup_scale()
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| /linux/drivers/gpu/drm/msm/disp/dpu1/ |
| H A D | dpu_plane.c | 427 uint32_t src_w, uint32_t src_h, uint32_t dst_w, uint32_t dst_h, in _dpu_plane_setup_scaler3() argument
445 mult_frac((1 << PHASE_STEP_SHIFT), src_w, dst_w); in _dpu_plane_setup_scaler3()
482 && (src_w == dst_w)) in _dpu_plane_setup_scaler3()
485 scale_cfg->dst_width = dst_w; in _dpu_plane_setup_scaler3()
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