Searched refs:dst_info (Results 1 – 3 of 3) sorted by relevance
54 l3 |= cfg->dst_info.psize << D40_MEM_LCSP3_DCFG_PSIZE_POS; in d40_log_cfg()55 l3 |= d40_width_to_bits(cfg->dst_info.data_width) in d40_log_cfg()90 if (cfg->dst_info.flow_ctrl == STEDMA40_NO_FLOW_CTRL) in d40_phy_cfg()107 if (cfg->dst_info.psize != STEDMA40_PSIZE_PHY_1) { in d40_phy_cfg()109 dst |= cfg->dst_info.psize << D40_SREG_CFG_PSIZE_POS; in d40_phy_cfg()115 dst |= d40_width_to_bits(cfg->dst_info.data_width) in d40_phy_cfg()126 if (cfg->dst_info.big_endian) in d40_phy_cfg()
117 .dst_info.data_width = DMA_SLAVE_BUSWIDTH_1_BYTE,118 .dst_info.psize = STEDMA40_PSIZE_PHY_1,119 .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,131 .dst_info.data_width = DMA_SLAVE_BUSWIDTH_1_BYTE,132 .dst_info.psize = STEDMA40_PSIZE_LOG_1,133 .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,1420 return num_elt * d40c->dma_cfg.dst_info.data_width; in d40_residue()1750 d40_psize_2_burst_size(is_log, conf->dst_info.psize) * in d40_validate_conf()1751 conf->dst_info.data_width) { in d40_validate_conf()2133 struct stedma40_half_channel_info *dst_info = &cfg->dst_info; in d40_prep_sg_log() local[all …]
104 struct stedma40_half_channel_info dst_info; member