/linux/drivers/gpu/drm/msm/disp/mdp5/ |
H A D | mdp5_cfg.c | 66 { .id = 0, .pp = 0, .dspp = 0, 68 { .id = 1, .pp = 1, .dspp = 1, 70 { .id = 2, .pp = 2, .dspp = 2, 72 { .id = 3, .pp = -1, .dspp = -1, 74 { .id = 4, .pp = -1, .dspp = -1, 81 .dspp = { 155 { .id = 0, .pp = 0, .dspp = 0, 157 { .id = 1, .pp = -1, .dspp = -1, 164 .dspp = { 230 { .id = 0, .pp = 0, .dspp = 0, [all …]
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H A D | mdp5_cfg.h | 37 int dspp; member 106 struct mdp5_sub_block dspp; member
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H A D | mdp5_mixer.c | 160 mixer->dspp = lm->dspp; in mdp5_mixer_init()
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H A D | mdp5_mixer.h | 18 int dspp; member
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/linux/drivers/gpu/drm/msm/disp/dpu1/ |
H A D | dpu_hw_ctl.c | 136 int dspp; in dpu_hw_ctl_trigger_flush_v1() local 149 for (dspp = DSPP_0; dspp < DSPP_MAX; dspp++) { in dpu_hw_ctl_trigger_flush_v1() 150 if (ctx->pending_dspp_flush_mask[dspp - DSPP_0]) in dpu_hw_ctl_trigger_flush_v1() 152 CTL_DSPP_n_FLUSH(dspp - DSPP_0), in dpu_hw_ctl_trigger_flush_v1() 153 ctx->pending_dspp_flush_mask[dspp - DSPP_0]); in dpu_hw_ctl_trigger_flush_v1() 348 enum dpu_dspp dspp, u32 dspp_sub_blk) in dpu_hw_ctl_update_pending_flush_dspp() argument 350 switch (dspp) { in dpu_hw_ctl_update_pending_flush_dspp() 369 struct dpu_hw_ctl *ctx, enum dpu_dspp dspp, u32 dspp_sub_blk) in dpu_hw_ctl_update_pending_flush_dspp_sub_blocks() argument 371 if (dspp >= DSPP_MAX) in dpu_hw_ctl_update_pending_flush_dspp_sub_blocks() 376 ctx->pending_dspp_flush_mask[dspp - DSPP_0] |= BIT(4); in dpu_hw_ctl_update_pending_flush_dspp_sub_blocks()
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H A D | dpu_rm.c | 138 const struct dpu_dspp_cfg *dspp = &cat->dspp[i]; in dpu_rm_init() local 140 hw = dpu_hw_dspp_init(dev, dspp, mmio); in dpu_rm_init() 146 rm->dspp_blks[dspp->id - DSPP_0] = &hw->base; in dpu_rm_init() 269 idx = lm_cfg->dspp - DSPP_0; in _dpu_rm_check_lm_and_get_connected_blks() 271 DPU_ERROR("failed to get dspp on lm %d\n", lm_cfg->dspp); in _dpu_rm_check_lm_and_get_connected_blks() 277 lm_cfg->dspp); in _dpu_rm_check_lm_and_get_connected_blks()
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H A D | dpu_kms.c | 924 base = dpu_kms->mmio + cat->dspp[i].base; in dpu_kms_mdp_snapshot() 925 msm_disp_snapshot_add_block(disp_state, cat->dspp[i].len, base, cat->dspp[i].name); in dpu_kms_mdp_snapshot() 927 if (cat->dspp[i].sblk && cat->dspp[i].sblk->pcc.len > 0) in dpu_kms_mdp_snapshot() 928 msm_disp_snapshot_add_block(disp_state, cat->dspp[i].sblk->pcc.len, in dpu_kms_mdp_snapshot() 929 base + cat->dspp[i].sblk->pcc.base, "%s_%s", in dpu_kms_mdp_snapshot() 930 cat->dspp[i].name, in dpu_kms_mdp_snapshot() 931 cat->dspp[i].sblk->pcc.name); in dpu_kms_mdp_snapshot()
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H A D | dpu_crtc.c | 771 struct dpu_hw_dspp *dspp; in _dpu_crtc_setup_cp_blocks() local 780 dspp = mixer[i].hw_dspp; in _dpu_crtc_setup_cp_blocks() 782 if (!dspp || !dspp->ops.setup_pcc) in _dpu_crtc_setup_cp_blocks() 786 dspp->ops.setup_pcc(dspp, NULL); in _dpu_crtc_setup_cp_blocks() 789 dspp->ops.setup_pcc(dspp, &cfg); in _dpu_crtc_setup_cp_blocks()
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/linux/drivers/gpu/drm/msm/disp/dpu1/catalog/ |
H A D | dpu_4_0_sdm845.h | 141 .dspp = DSPP_0, 149 .dspp = DSPP_1, 157 .dspp = DSPP_2, 164 .dspp = DSPP_3, 341 .dspp = sdm845_dspp,
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H A D | dpu_8_1_sm8450.h | 150 .dspp = DSPP_0, 158 .dspp = DSPP_1, 166 .dspp = DSPP_2, 174 .dspp = DSPP_3, 422 .dspp = sm8450_dspp,
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H A D | dpu_5_4_sm6125.h | 103 .dspp = DSPP_0, 111 .dspp = 0, 226 .dspp = sm6125_dspp,
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H A D | dpu_6_4_sm6350.h | 102 .dspp = DSPP_0, 110 .dspp = 0, 232 .dspp = sm6350_dspp,
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H A D | dpu_8_0_sc8280xp.h | 149 .dspp = DSPP_0, 157 .dspp = DSPP_1, 165 .dspp = DSPP_2, 173 .dspp = DSPP_3, 445 .dspp = sc8280xp_dspp,
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H A D | dpu_6_5_qcm2290.h | 64 .dspp = DSPP_0, 140 .dspp = qcm2290_dspp,
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H A D | dpu_6_3_sm6115.h | 64 .dspp = DSPP_0, 147 .dspp = sm6115_dspp,
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H A D | dpu_3_2_sdm660.h | 114 .dspp = DSPP_0, 122 .dspp = DSPP_1, 279 .dspp = sdm660_dspp,
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H A D | dpu_6_9_sm6375.h | 66 .dspp = DSPP_0, 157 .dspp = sm6375_dspp,
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H A D | dpu_3_0_msm8998.h | 143 .dspp = DSPP_0, 151 .dspp = DSPP_1, 324 .dspp = msm8998_dspp,
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H A D | dpu_5_2_sm7150.h | 123 .dspp = DSPP_0, 131 .dspp = DSPP_1, 319 .dspp = sm7150_dspp,
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H A D | dpu_6_2_sc7180.h | 94 .dspp = DSPP_0, 214 .dspp = sc7180_dspp,
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H A D | dpu_3_3_sdm630.h | 104 .dspp = DSPP_0, 215 .dspp = sdm630_dspp,
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H A D | dpu_9_0_sm8550.h | 147 .dspp = DSPP_0, 155 .dspp = DSPP_1, 415 .dspp = sm8550_dspp,
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H A D | dpu_7_0_sm8350.h | 149 .dspp = DSPP_0, 157 .dspp = DSPP_1, 404 .dspp = sm8350_dspp,
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H A D | dpu_6_0_sm8250.h | 149 .dspp = DSPP_0, 157 .dspp = DSPP_1, 395 .dspp = sm8250_dspp,
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H A D | dpu_5_0_sm8150.h | 151 .dspp = DSPP_0, 159 .dspp = DSPP_1, 396 .dspp = sm8150_dspp,
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