| /linux/drivers/gpu/drm/panel/ |
| H A D | panel-jadard-jd9365da-h3.c | 50 #define jd9365da_switch_page(dsi_ctx, page) \ argument
51 mipi_dsi_dcs_write_seq_multi(dsi_ctx, JD9365DA_DCS_SWITCH_PAGE, (page))
53 static void jadard_enable_standard_cmds(struct mipi_dsi_multi_context *dsi_ctx) in jadard_enable_standard_cmds() argument
55 mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe1, 0x93); in jadard_enable_standard_cmds()
56 mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe2, 0x65); in jadard_enable_standard_cmds()
57 mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe3, 0xf8); in jadard_enable_standard_cmds()
58 mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x03); in jadard_enable_standard_cmds()
69 struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi }; in jadard_disable() local
72 mipi_dsi_msleep(&dsi_ctx, jadard->desc->backlight_off_to_display_off_delay_ms); in jadard_disable()
74 mipi_dsi_dcs_set_display_off_multi(&dsi_ctx); in jadard_disable()
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| H A D | panel-himax-hx83102.c | 87 static void hx83102_enable_extended_cmds(struct mipi_dsi_multi_context *dsi_ctx, bool enable) in hx83102_enable_extended_cmds() argument
90 mipi_dsi_dcs_write_seq_multi(dsi_ctx, HX83102_SETEXTC, 0x83, 0x10, 0x21, 0x55, 0x00); in hx83102_enable_extended_cmds()
92 mipi_dsi_dcs_write_seq_multi(dsi_ctx, HX83102_SETEXTC, 0x00, 0x00, 0x00); in hx83102_enable_extended_cmds()
97 struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; in starry_himax83102_j02_init() local
99 hx83102_enable_extended_cmds(&dsi_ctx, true); in starry_himax83102_j02_init()
100 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPOWER, 0x2c, 0xb5, 0xb5, 0x31, 0xf1, in starry_himax83102_j02_init()
104 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETDISP, 0x00, 0x47, 0xb0, 0x80, 0x00, in starry_himax83102_j02_init()
106 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCYC, 0x76, 0x76, 0x76, 0x76, 0x76, in starry_himax83102_j02_init()
108 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xcd); in starry_himax83102_j02_init()
109 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x84); in starry_himax83102_j02_init()
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| H A D | panel-novatek-nt37801.c | 51 #define novatek_nt37801_switch_page(dsi_ctx, page) \ argument
52 mipi_dsi_dcs_write_seq_multi((dsi_ctx), NT37801_DCS_SWITCH_PAGE, \
58 struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; in novatek_nt37801_on() local
62 novatek_nt37801_switch_page(&dsi_ctx, 0x01); in novatek_nt37801_on()
63 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x01); in novatek_nt37801_on()
64 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc5, 0x0b, 0x0b, 0x0b); in novatek_nt37801_on()
65 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0xaa, 0x55, 0xa5, 0x80); in novatek_nt37801_on()
66 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x02); in novatek_nt37801_on()
67 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf5, 0x10); in novatek_nt37801_on()
68 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x1b); in novatek_nt37801_on()
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| H A D | panel-novatek-nt35560.c | 151 struct mipi_dsi_multi_context dsi_ctx = { in nt35560_set_brightness() local
161 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, in nt35560_set_brightness()
164 return dsi_ctx.accum_err; in nt35560_set_brightness()
185 mipi_dsi_dcs_write_var_seq_multi(&dsi_ctx, in nt35560_set_brightness()
189 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf3, 0xaa); in nt35560_set_brightness()
190 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x01); in nt35560_set_brightness()
191 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x01); in nt35560_set_brightness()
193 mipi_dsi_dcs_write_var_seq_multi(&dsi_ctx, 0x22, pwm_div); in nt35560_set_brightness()
195 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0xaa); in nt35560_set_brightness()
198 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, in nt35560_set_brightness()
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| H A D | panel-startek-kd070fhfid015.c | 55 struct mipi_dsi_multi_context dsi_ctx = {.dsi = dsi}; in stk_panel_init() local
57 mipi_dsi_dcs_soft_reset_multi(&dsi_ctx); in stk_panel_init()
58 mipi_dsi_msleep(&dsi_ctx, 5); in stk_panel_init()
59 mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); in stk_panel_init()
60 mipi_dsi_msleep(&dsi_ctx, 120); in stk_panel_init()
62 mipi_dsi_generic_write_seq_multi(&dsi_ctx, DSI_REG_MCAP, 0x04); in stk_panel_init()
65 mipi_dsi_generic_write_seq_multi(&dsi_ctx, DSI_REG_IS, 0x14, 0x08, 0x00, 0x22, 0x00); in stk_panel_init()
66 mipi_dsi_generic_write_seq_multi(&dsi_ctx, DSI_REG_IIS, 0x0c, 0x00); in stk_panel_init()
67 mipi_dsi_generic_write_seq_multi(&dsi_ctx, DSI_REG_CTRL, 0x3a, 0xd3); in stk_panel_init()
69 mipi_dsi_dcs_set_display_brightness_multi(&dsi_ctx, 0x77); in stk_panel_init()
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| H A D | panel-samsung-sofef00.c | 58 struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; in sofef00_panel_on() local
62 mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); in sofef00_panel_on()
63 mipi_dsi_usleep_range(&dsi_ctx, 10000, 11000); in sofef00_panel_on()
65 sofef00_test_key_on_lvl2(&dsi_ctx); in sofef00_panel_on()
66 mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK); in sofef00_panel_on()
67 sofef00_test_key_off_lvl2(&dsi_ctx); in sofef00_panel_on()
69 sofef00_test_key_on_lvl2(&dsi_ctx); in sofef00_panel_on()
70 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x07); in sofef00_panel_on()
71 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0x12); in sofef00_panel_on()
72 sofef00_test_key_off_lvl2(&dsi_ctx); in sofef00_panel_on()
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