Searched refs:dsc_optc_cfg (Results 1 – 8 of 8) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/dsc/ |
| H A D | dsc.h | 110 struct dsc_optc_config *dsc_optc_cfg);
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| /linux/drivers/gpu/drm/amd/display/dc/link/ |
| H A D | link_dpms.c | 832 struct dsc_optc_config dsc_optc_cfg = {0}; in link_set_dsc_on_stream() local
849 dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg); in link_set_dsc_on_stream()
856 odm_dsc->funcs->dsc_set_config(odm_dsc, &dsc_cfg, &dsc_optc_cfg); in link_set_dsc_on_stream()
863 …optc_dsc_mode = dsc_optc_cfg.is_pixel_format_444 ? OPTC_DSC_ENABLED_444 : OPTC_DSC_ENABLED_NATIVE_… in link_set_dsc_on_stream()
868 dsc_optc_config_log(dsc, &dsc_optc_cfg); in link_set_dsc_on_stream()
872 dsc_optc_cfg.bytes_per_pixel, in link_set_dsc_on_stream()
873 dsc_optc_cfg.slice_width); in link_set_dsc_on_stream()
880 dsc_optc_config_log(dsc, &dsc_optc_cfg); in link_set_dsc_on_stream()
883 dsc_optc_cfg.bytes_per_pixel, in link_set_dsc_on_stream()
884 dsc_optc_cfg.slice_width); in link_set_dsc_on_stream()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| H A D | dcn32_hwseq.c | 1046 struct dsc_optc_config dsc_optc_cfg = {0}; in dcn32_update_dsc_on_stream() local
1077 dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg); in dcn32_update_dsc_on_stream()
1087 odm_dsc->funcs->dsc_set_config(odm_dsc, &dsc_cfg, &dsc_optc_cfg); in dcn32_update_dsc_on_stream()
1090 …optc_dsc_mode = dsc_optc_cfg.is_pixel_format_444 ? OPTC_DSC_ENABLED_444 : OPTC_DSC_ENABLED_NATIVE_… in dcn32_update_dsc_on_stream()
1095 dsc_optc_cfg.bytes_per_pixel, in dcn32_update_dsc_on_stream()
1096 dsc_optc_cfg.slice_width); in dcn32_update_dsc_on_stream()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_hw_sequencer.c | 2264 struct dsc_optc_config *dsc_optc_cfg = params->dsc_set_config_params.dsc_optc_cfg; in hwss_dsc_set_config() local
2267 dsc->funcs->dsc_set_config(dsc, dsc_cfg, dsc_optc_cfg); in hwss_dsc_set_config()
2287 struct dsc_optc_config *dsc_optc_cfg = params->tg_set_dsc_config_params.dsc_optc_cfg; in hwss_tg_set_dsc_config() local
2289 if (dsc_optc_cfg) { in hwss_tg_set_dsc_config()
2290 bytes_per_pixel = dsc_optc_cfg->bytes_per_pixel; in hwss_tg_set_dsc_config()
2291 slice_width = dsc_optc_cfg->slice_width; in hwss_tg_set_dsc_config()
2292 optc_dsc_mode = dsc_optc_cfg->is_pixel_format_444 ? in hwss_tg_set_dsc_config()
2350 ¶ms->dsc_calculate_and_set_config_params.dsc_optc_cfg); in hwss_dsc_calculate_and_set_config()
3218 struct timing_generator *tg, struct dsc_optc_config *dsc_optc_cfg, bool enable) in hwss_add_tg_set_dsc_config() argument
3223 …eq_state->steps[*seq_state->num_steps].params.tg_set_dsc_config_params.dsc_optc_cfg = dsc_optc_cfg; in hwss_add_tg_set_dsc_config()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| H A D | dcn35_hwseq.c | 342 struct dsc_optc_config dsc_optc_cfg = {0}; in update_dsc_on_stream() local
369 dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg); in update_dsc_on_stream()
375 odm_dsc->funcs->dsc_set_config(odm_dsc, &dsc_cfg, &dsc_optc_cfg); in update_dsc_on_stream()
381 …optc_dsc_mode = dsc_optc_cfg.is_pixel_format_444 ? OPTC_DSC_ENABLED_444 : OPTC_DSC_ENABLED_NATIVE_… in update_dsc_on_stream()
387 dsc_optc_cfg.bytes_per_pixel, in update_dsc_on_stream()
388 dsc_optc_cfg.slice_width); in update_dsc_on_stream()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/ |
| H A D | hw_sequencer.h | 229 struct dsc_optc_config *dsc_optc_cfg; member
239 struct dsc_optc_config *dsc_optc_cfg; member
254 struct dsc_optc_config dsc_optc_cfg; member
2030 struct dsc_optc_config *dsc_optc_cfg,
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/ |
| H A D | dcn401_dsc.h | 340 struct dsc_optc_config *dsc_optc_cfg);
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 1691 &seq_state->steps[last_dsc_calc].params.dsc_calculate_and_set_config_params.dsc_optc_cfg, true); in dcn401_add_dsc_sequence_for_odm_change()
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