Searched refs:dsc_inst (Results 1 – 11 of 11) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/pg/dcn35/ |
| H A D | dcn35_pg_cntl.c | 47 static bool pg_cntl35_dsc_pg_status(struct pg_cntl *pg_cntl, unsigned int dsc_inst) in pg_cntl35_dsc_pg_status() argument 55 switch (dsc_inst) { in pg_cntl35_dsc_pg_status() 76 void pg_cntl35_dsc_pg_control(struct pg_cntl *pg_cntl, unsigned int dsc_inst, bool power_on) in pg_cntl35_dsc_pg_control() argument 90 block_enabled = pg_cntl35_dsc_pg_status(pg_cntl, dsc_inst); in pg_cntl35_dsc_pg_control() 103 switch (dsc_inst) { in pg_cntl35_dsc_pg_control() 141 if (dsc_inst < MAX_PIPES) in pg_cntl35_dsc_pg_control() 142 pg_cntl->pg_pipe_res_enable[PG_DSC][dsc_inst] = power_on; in pg_cntl35_dsc_pg_control()
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| H A D | dcn35_pg_cntl.h | 172 void pg_cntl35_dsc_pg_control(struct pg_cntl *pg_cntl, unsigned int dsc_inst, bool power_on);
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| H A D | dcn32_hwseq.h | 35 unsigned int dsc_inst, 108 unsigned int dsc_inst);
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn302/ |
| H A D | dcn302_hwseq.c | 159 void dcn302_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on) in dcn302_dsc_pg_control() argument 175 switch (dsc_inst) { in dcn302_dsc_pg_control()
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| H A D | dcn302_hwseq.h | 33 void dcn302_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn303/ |
| H A D | dcn303_hwseq.h | 34 void dcn303_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn314/ |
| H A D | dcn314_hwseq.h | 36 void dcn314_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | pg_cntl.h | 40 void (*dsc_pg_control)(struct pg_cntl *pg_cntl, unsigned int dsc_inst, bool power_on);
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| H A D | dccg.h | 336 void (*set_dto_dscclk)(struct dccg *dccg, uint32_t dsc_inst, uint32_t num_slices_h); 337 void (*set_ref_dscclk)(struct dccg *dccg, uint32_t dsc_inst);
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.h | 135 unsigned int dsc_inst,
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_hw_sequencer.c | 2862 int dsc_inst = params->dsc_pg_status_params.dsc_inst; in hwss_dsc_pg_status() local 2865 params->dsc_pg_status_params.is_ungated = hws->funcs.dsc_pg_status(hws, dsc_inst); in hwss_dsc_pg_status() 2897 int dsc_inst = params->dccg_set_ref_dscclk_params.dsc_inst; in hwss_dccg_set_ref_dscclk() local 2905 dccg->funcs->set_ref_dscclk(dccg, dsc_inst); in hwss_dccg_set_ref_dscclk() 3656 int dsc_inst, in hwss_add_dsc_pg_status() argument 3662 seq_state->steps[*seq_state->num_steps].params.dsc_pg_status_params.dsc_inst = dsc_inst; in hwss_add_dsc_pg_status() 3694 int dsc_inst, in hwss_add_dccg_set_ref_dscclk() argument 3700 seq_state->steps[*seq_state->num_steps].params.dccg_set_ref_dscclk_params.dsc_inst = dsc_inst; in hwss_add_dccg_set_ref_dscclk()
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