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Searched refs:dsc_cfg (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_dpms.c752 struct dsc_config dsc_cfg; in link_set_dsc_on_stream() local
757 …dsc_cfg.pic_width = (stream->timing.h_addressable + pipe_ctx->dsc_padding_params.dsc_hactive_paddi… in link_set_dsc_on_stream()
759 …dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v… in link_set_dsc_on_stream()
760 dsc_cfg.pixel_encoding = stream->timing.pixel_encoding; in link_set_dsc_on_stream()
761 dsc_cfg.color_depth = stream->timing.display_color_depth; in link_set_dsc_on_stream()
762 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; in link_set_dsc_on_stream()
763 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; in link_set_dsc_on_stream()
764 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in link_set_dsc_on_stream()
765 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in link_set_dsc_on_stream()
766 dsc_cfg.dsc_padding = 0; in link_set_dsc_on_stream()
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/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_mst_types.c974 memset(&params[i].timing->dsc_cfg, 0, sizeof(params[i].timing->dsc_cfg)); in set_dsc_configs_from_fairness_vars()
982 &params[i].timing->dsc_cfg)) { in set_dsc_configs_from_fairness_vars()
986 params[i].timing->dsc_cfg.bits_per_pixel = params[i].bpp_overwrite; in set_dsc_configs_from_fairness_vars()
988 params[i].timing->dsc_cfg.bits_per_pixel = vars[i + k].bpp_x16; in set_dsc_configs_from_fairness_vars()
991 params[i].timing->dsc_cfg.num_slices_h = params[i].num_slices_h; in set_dsc_configs_from_fairness_vars()
994 params[i].timing->dsc_cfg.num_slices_v = params[i].num_slices_v; in set_dsc_configs_from_fairness_vars()
998 params[i].timing->dsc_cfg.mst_pbn = vars[i + k].pbn; in set_dsc_configs_from_fairness_vars()
1011 params[i].timing->dsc_cfg.bits_per_pixel, in set_dsc_configs_from_fairness_vars()
1279 &stream->timing.dsc_cfg)) { in build_frl_mst_dsc_params()
1281 …if (stream->sink->dsc_caps.dsc_dec_caps.is_vic_all_bpp && min_bpp_x16 <= stream->timing.dsc_cfg.bi… in build_frl_mst_dsc_params()
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H A Damdgpu_dm_connector.c1213 struct dc_dsc_config dsc_cfg = {0}; in apply_dsc_policy_for_edp() local
1245 &dsc_cfg)) { in apply_dsc_policy_for_edp()
1246 stream->timing.dsc_cfg = dsc_cfg; in apply_dsc_policy_for_edp()
1248 stream->timing.dsc_cfg.bits_per_pixel = edp_max_bpp_x16; in apply_dsc_policy_for_edp()
1260 &dsc_cfg)) { in apply_dsc_policy_for_edp()
1261 stream->timing.dsc_cfg = dsc_cfg; in apply_dsc_policy_for_edp()
1310 &stream->timing.dsc_cfg)) { in apply_dsc_policy_for_stream()
1340 &stream->timing.dsc_cfg)) { in apply_dsc_policy_for_stream()
1369 &stream->timing.dsc_cfg)) { in apply_dsc_policy_for_stream()
1382 stream->timing.dsc_cfg.num_slices_h = aconnector->dsc_settings.dsc_num_slices_h; in apply_dsc_policy_for_stream()
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/linux/include/drm/display/
H A Ddrm_dsc_helper.h25 const struct drm_dsc_config *dsc_cfg);
/linux/drivers/gpu/drm/panel/
H A Dpanel-himax-hx83121a.c48 const struct drm_dsc_config *dsc_cfg; member
639 ctx->dsc = *desc->dsc_cfg; in himax_probe()
718 .dsc_cfg = &ppc357db1_4_dsc_cfg,
737 .dsc_cfg = &ppc357db1_4_dsc_cfg,
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc.c2025 if (crtc_timing->dsc_cfg.num_slices_h != num_slices_h) { in dc_validate_boot_timing()
2030 if (crtc_timing->dsc_cfg.num_slices_v != num_slices_v) { in dc_validate_boot_timing()
2035 if (crtc_timing->dsc_cfg.bits_per_pixel != dsc_state.dsc_bits_per_pixel) { in dc_validate_boot_timing()
2040 if (crtc_timing->dsc_cfg.block_pred_enable != dsc_state.dsc_block_pred_enable) { in dc_validate_boot_timing()
2045 if (crtc_timing->dsc_cfg.linebuf_depth != dsc_state.dsc_line_buf_depth) { in dc_validate_boot_timing()
2050 if (crtc_timing->dsc_cfg.version_minor != dsc_state.dsc_version_minor) { in dc_validate_boot_timing()
2055 if (crtc_timing->dsc_cfg.ycbcr422_simple != dsc_state.dsc_simple_422) { in dc_validate_boot_timing()
3579 struct dc_dsc_config old_dsc_cfg = stream->timing.dsc_cfg; in copy_stream_update_to_stream()
3588 stream->timing.dsc_cfg = *update->dsc_config; in copy_stream_update_to_stream()
3592 stream->timing.dsc_cfg = old_dsc_cfg; in copy_stream_update_to_stream()
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H A Ddc_resource.c4747 if (hactive % stream->timing.dsc_cfg.num_slices_h != 0) { in calculate_timing_params_for_dsc_with_padding()
4748 ceil_slice_width = (hactive / stream->timing.dsc_cfg.num_slices_h) + 1; in calculate_timing_params_for_dsc_with_padding()
4755 (uint8_t)(ceil_slice_width * stream->timing.dsc_cfg.num_slices_h - hactive); in calculate_timing_params_for_dsc_with_padding()
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
H A Ddcn401_dsc.h338 bool dsc401_validate_stream(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg…
339 void dsc401_set_config(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn60/
H A Ddcn60_hwseq.c106 stream->timing.dsc_cfg.bits_per_pixel; in dcn60_build_audio_output()
109 stream->timing.dsc_cfg.num_slices_h; in dcn60_build_audio_output()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddml2_translation_helper.c795 out->DSCSlices[location] = in->timing.dsc_cfg.num_slices_h; in populate_dml_output_cfg_from_stream_state()
860 if (in->timing.flags.DSC && !in->timing.dsc_cfg.ycbcr422_simple) in populate_dml_output_cfg_from_stream_state()
873 out->OutputBpp[location] = in->timing.dsc_cfg.bits_per_pixel / 16.0; in populate_dml_output_cfg_from_stream_state()