| /linux/drivers/gpu/drm/panel/ |
| H A D | panel-novatek-nt37801.c | 22 struct drm_dsc_config dsc; member 137 drm_dsc_pps_payload_pack(&pps, &ctx->dsc); in novatek_nt37801_prepare() 276 dsi->dsc = &ctx->dsc; in novatek_nt37801_probe() 277 ctx->dsc.dsc_version_major = 1; in novatek_nt37801_probe() 278 ctx->dsc.dsc_version_minor = 1; in novatek_nt37801_probe() 279 ctx->dsc.slice_height = 40; in novatek_nt37801_probe() 280 ctx->dsc.slice_width = 720; in novatek_nt37801_probe() 281 ctx->dsc.slice_count = 1440 / ctx->dsc.slice_width; in novatek_nt37801_probe() 282 ctx->dsc.bits_per_component = 8; in novatek_nt37801_probe() 283 ctx->dsc.bits_per_pixel = 8 << 4; /* 4 fractional bits */ in novatek_nt37801_probe() [all …]
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| H A D | panel-visionox-rm692e5.c | 27 struct drm_dsc_config dsc; member 209 drm_dsc_pps_payload_pack(&pps, &ctx->dsc); in visionox_rm692e5_prepare() 396 dsi->dsc = &ctx->dsc; in visionox_rm692e5_probe() 397 ctx->dsc.dsc_version_major = 1; in visionox_rm692e5_probe() 398 ctx->dsc.dsc_version_minor = 1; in visionox_rm692e5_probe() 399 ctx->dsc.slice_height = 20; in visionox_rm692e5_probe() 400 ctx->dsc.slice_width = 540; in visionox_rm692e5_probe() 401 ctx->dsc.slice_count = 1080 / ctx->dsc.slice_width; in visionox_rm692e5_probe() 402 ctx->dsc.bits_per_component = 10; in visionox_rm692e5_probe() 403 ctx->dsc.bits_per_pixel = 8 << 4; in visionox_rm692e5_probe() [all …]
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| H A D | panel-himax-hx83121a.c | 33 struct drm_dsc_config dsc; member 117 drm_dsc_pps_payload_pack(&pps, &ctx->dsc); in himax_prepare() 639 ctx->dsc = *desc->dsc_cfg; in himax_probe() 691 ctx->dsi[i]->dsc = enable_dsc ? &ctx->dsc : NULL; in himax_probe()
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| /linux/drivers/gpu/drm/msm/dsi/ |
| H A D | dsi_host.c | 37 static int dsi_populate_dsc_params(struct msm_dsi_host *msm_host, struct drm_dsc_config *dsc); 168 struct drm_dsc_config *dsc; member 605 const struct drm_dsc_config *dsc, in dsi_adjust_pclk_for_compression() argument 620 new_hdisplay = DIV_ROUND_UP(hdisplay * drm_dsc_get_bpp_int(dsc), in dsi_adjust_pclk_for_compression() 621 dsc->bits_per_component * 3); in dsi_adjust_pclk_for_compression() 632 const struct drm_dsc_config *dsc, bool is_bonded_dsi) in dsi_get_pclk_rate() argument 638 if (dsc) in dsi_get_pclk_rate() 639 pclk_rate = dsi_adjust_pclk_for_compression(mode, dsc, is_bonded_dsi); in dsi_get_pclk_rate() 659 unsigned long pclk_rate = dsi_get_pclk_rate(mode, msm_host->dsc, is_bonded_dsi); in dsi_byte_clk_get_rate() 678 msm_host->pixel_clk_rate = dsi_get_pclk_rate(msm_host->mode, msm_host->dsc, is_bonded_dsi); in dsi_calc_pclk() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/ |
| H A D | dcn401_dsc.h | 13 #define TO_DCN401_DSC(dsc)\ argument 14 container_of(dsc, struct dcn401_dsc, base) 328 void dsc401_construct(struct dcn401_dsc *dsc, 337 void dsc401_read_state(struct display_stream_compressor *dsc, struct dcn_dsc_state *s); 338 bool dsc401_validate_stream(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg… 339 void dsc401_set_config(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg, 341 void dsc401_enable(struct display_stream_compressor *dsc, int opp_pipe); 342 void dsc401_disable(struct display_stream_compressor *dsc); 343 void dsc401_disconnect(struct display_stream_compressor *dsc); 344 void dsc401_wait_disconnect_pending_clear(struct display_stream_compressor *dsc);
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| /linux/drivers/gpu/drm/tests/ |
| H A D | drm_dp_mst_helper_test.c | 18 const bool dsc; member 26 .dsc = false, 32 .dsc = false, 38 .dsc = false, 44 .dsc = true, 50 .dsc = true, 65 sprintf(desc, "Clock %d BPP %d DSC %s", t->clock, t->bpp, t->dsc ? "enabled" : "disabled"); in dp_mst_calc_pbn_mode_desc()
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_debugfs.c | 1566 struct display_stream_compressor *dsc; in dp_dsc_clock_en_read() local 1587 dsc = pipe_ctx->stream_res.dsc; in dp_dsc_clock_en_read() 1588 if (dsc) in dp_dsc_clock_en_read() 1589 dsc->funcs->dsc_read_state(dsc, &dsc_state); in dp_dsc_clock_en_read() 1752 struct display_stream_compressor *dsc; in dp_dsc_slice_width_read() local 1773 dsc = pipe_ctx->stream_res.dsc; in dp_dsc_slice_width_read() 1774 if (dsc) in dp_dsc_slice_width_read() 1775 dsc->funcs->dsc_read_state(dsc, &dsc_state); in dp_dsc_slice_width_read() 1936 struct display_stream_compressor *dsc; in dp_dsc_slice_height_read() local 1957 dsc = pipe_ctx->stream_res.dsc; in dp_dsc_slice_height_read() [all …]
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| /linux/drivers/net/ethernet/broadcom/ |
| H A D | sb1250-mac.c | 773 struct sbdmadscr *dsc; in sbdma_add_rcvbuffer() local 780 dsc = d->sbdma_addptr; in sbdma_add_rcvbuffer() 837 dsc->dscr_a = virt_to_phys(sb_new->data) | in sbdma_add_rcvbuffer() 840 dsc->dscr_a = virt_to_phys(sb_new->data) | in sbdma_add_rcvbuffer() 846 dsc->dscr_b = 0; in sbdma_add_rcvbuffer() 852 d->sbdma_ctxtable[dsc-d->sbdma_dscrtable] = sb_new; in sbdma_add_rcvbuffer() 887 struct sbdmadscr *dsc; in sbdma_add_txbuffer() local 895 dsc = d->sbdma_addptr; in sbdma_add_txbuffer() 926 dsc->dscr_a = phys | in sbdma_add_txbuffer() 935 dsc->dscr_b = V_DMA_DSCRB_OPTIONS(K_DMA_ETHTX_APPENDCRC_APPENDPAD) | in sbdma_add_txbuffer() [all …]
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_dp_mst.c | 145 bool dsc) in intel_dp_mst_max_dpt_bpp() argument 151 if (!intel_dp_is_uhbr(crtc_state) || DISPLAY_VER(display) >= 20 || !dsc) in intel_dp_mst_max_dpt_bpp() 252 int min_bpp_x16, int max_bpp_x16, int bpp_step_x16, bool dsc) in intel_dp_mtp_tu_compute_config() argument 267 drm_WARN_ON(display->drm, !dsc && (fxp_q4_to_frac(min_bpp_x16) || in intel_dp_mtp_tu_compute_config() 293 crtc_state->fec_enable = intel_dp_needs_8b10b_fec(crtc_state, dsc); in intel_dp_mtp_tu_compute_config() 301 if (crtc_state->fec_enable && dsc && in intel_dp_mtp_tu_compute_config() 305 max_dpt_bpp_x16 = fxp_q4_from_int(intel_dp_mst_max_dpt_bpp(crtc_state, dsc)); in intel_dp_mtp_tu_compute_config() 315 if (dsc) { in intel_dp_mtp_tu_compute_config() 332 if (dsc && !intel_dp_dsc_valid_compressed_bpp(intel_dp, bpp_x16)) { in intel_dp_mtp_tu_compute_config() 338 link_bpp_x16 = dsc ? bpp_x16 : in intel_dp_mtp_tu_compute_config() [all …]
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| H A D | intel_bios.c | 76 struct dsc_compression_parameters_entry *dsc; member 2201 devdata->dsc = kmemdup(¶ms->data[index], in parse_compression_parameters() 2202 sizeof(*devdata->dsc), GFP_KERNEL); in parse_compression_parameters() 2765 devdata->dsc != NULL); in print_ddi_port() 3373 kfree(devdata->dsc); in intel_bios_driver_remove() 3572 struct dsc_compression_parameters_entry *dsc, in fill_dsc() argument 3576 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in fill_dsc() 3580 vdsc_cfg->dsc_version_major = dsc->version_major; in fill_dsc() 3581 vdsc_cfg->dsc_version_minor = dsc->version_minor; in fill_dsc() 3583 if (dsc->support_12bpc && dsc_max_bpc >= 12) in fill_dsc() [all …]
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| H A D | intel_dp.c | 1326 bool dsc = false; in intel_dp_mode_valid_format() local 1385 dsc = dsc_max_compressed_bpp && dsc_slice_count; in intel_dp_mode_valid_format() 1392 dsc = intel_dp_mode_valid_with_dsc(connector, in intel_dp_mode_valid_format() 1401 if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc) { in intel_dp_mode_valid_format() 1406 if (mode_rate > max_rate && !dsc) { in intel_dp_mode_valid_format() 1415 if (!dsc) in intel_dp_mode_valid_format() 1861 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in intel_dp_dsc_compute_params() 1991 intel_dsc_line_slice_count(&pipe_config->dsc.slice_config); in dsc_compute_link_config() 2244 pipe_config->dsc.compressed_bpp_x16 = max_bpp_x16; in dsc_compute_compressed_bpp() 2259 pipe_config->dsc.compressed_bpp_x16 = bpp_x16; in dsc_compute_compressed_bpp() [all …]
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| H A D | intel_dp_mst.h | 39 int min_bpp_x16, int max_bpp_x16, int bpp_step_x16, bool dsc);
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| /linux/include/drm/display/ |
| H A D | drm_dsc_helper.h | 30 u8 drm_dsc_initial_scale_value(const struct drm_dsc_config *dsc); 31 u32 drm_dsc_flatness_det_thresh(const struct drm_dsc_config *dsc);
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| /linux/drivers/gpu/drm/msm/disp/dpu1/ |
| H A D | dpu_hw_dsc.h | 37 struct drm_dsc_config *dsc, 47 struct drm_dsc_config *dsc);
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| H A D | dpu_encoder.c | 217 struct drm_dsc_config *dsc; member 303 return dpu_enc->dsc ? true : false; in dpu_encoder_is_dsc_enabled() 668 struct drm_dsc_config *dsc; in dpu_encoder_update_topology() local 676 dsc = dpu_encoder_get_dsc_config(drm_enc); in dpu_encoder_update_topology() 679 if (dsc) { in dpu_encoder_update_topology() 1344 dpu_enc->dsc = dpu_encoder_get_dsc_config(drm_enc); in dpu_encoder_virt_atomic_enable() 1966 dpu_encoder_dsc_initial_line_calc(struct drm_dsc_config *dsc, in dpu_encoder_dsc_initial_line_calc() argument 1971 soft_slice_per_enc = enc_ip_width / dsc->slice_width; in dpu_encoder_dsc_initial_line_calc() 1983 ssm_delay = ((dsc->bits_per_component < 10) ? 84 : 92); in dpu_encoder_dsc_initial_line_calc() 1984 total_pixels = ssm_delay * 3 + dsc->initial_xmit_delay + 47; in dpu_encoder_dsc_initial_line_calc() [all …]
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| /linux/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ |
| H A D | ktls_stats.c | 50 #define MLX5E_READ_CTR_ATOMIC64(ptr, dsc, i) \ argument 51 atomic64_read((atomic64_t *)((char *)(ptr) + (dsc)[i].offset))
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| H A D | ipsec_stats.c | 61 #define MLX5E_READ_CTR_ATOMIC64(ptr, dsc, i) \ argument 62 atomic64_read((atomic64_t *)((char *)(ptr) + (dsc)[i].offset))
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| /linux/arch/mips/mm/ |
| H A D | cerr-sb1.c | 466 struct dc_state *dsc = dc_states; in dc_state_str() local 467 while (dsc->val != 0xff) { in dc_state_str() 468 if (dsc->val == state) in dc_state_str() 470 dsc++; in dc_state_str() 472 return dsc->name; in dc_state_str()
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| /linux/sound/pci/ctxfi/ |
| H A D | ctdaio.c | 450 struct daio_desc dsc = {0}; in dao_rsc_reinit() 452 dsc.type = dao->daio.type; in dao_rsc_reinit() 453 dsc.msr = desc->msr; in dao_rsc_reinit() 454 dsc.passthru = desc->passthru; in dao_rsc_reinit() 455 dsc.output = dao->daio.output; 457 return dao_rsc_init(dao, &dsc, mgr); in dai_rsc_init() 446 struct daio_desc dsc = {0}; dao_rsc_reinit() local
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn35/ |
| H A D | dcn35_dsc.h | 50 void dsc35_construct(struct dcn20_dsc *dsc,
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| /linux/tools/perf/util/ |
| H A D | dlfilter.c | 593 const char *dsc; in get_filter_desc() local 596 dsc = desc_fn(&long_dsc); in get_filter_desc() 597 if (dsc) in get_filter_desc() 598 *desc = strdup(dsc); in get_filter_desc()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | Makefile | 76 CFLAGS_$(AMDDALPATH)/dc/dml/dsc/rc_calc_fpu.o := $(dml_ccflags) 99 CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/dsc/rc_calc_fpu.o := $(dml_rcflags) 144 DML += dsc/rc_calc_fpu.o
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| /linux/drivers/usb/atm/ |
| H A D | ueagle-atm.c | 1946 struct cmv_dsc_e1 *dsc = &sc->cmv_dsc.e1; in uea_dispatch_cmv_e1() local 1958 if (cmv->bFunction != dsc->function) { in uea_dispatch_cmv_e1() 1961 cmv->wIndex = cpu_to_le16(dsc->idx); in uea_dispatch_cmv_e1() 1962 put_unaligned_le32(dsc->address, in uea_dispatch_cmv_e1() 1964 cmv->wOffsetAddress = cpu_to_le16(dsc->offset); in uea_dispatch_cmv_e1() 1976 if (le16_to_cpu(cmv->wIndex) != dsc->idx || in uea_dispatch_cmv_e1() 1977 get_unaligned_le32(&cmv->dwSymbolicAddress) != dsc->address || in uea_dispatch_cmv_e1() 1978 le16_to_cpu(cmv->wOffsetAddress) != dsc->offset) in uea_dispatch_cmv_e1() 2003 struct cmv_dsc_e4 *dsc = &sc->cmv_dsc.e4; in uea_dispatch_cmv_e4() local 2011 if (be16_to_cpu(cmv->wFunction) != dsc->function) in uea_dispatch_cmv_e4() [all …]
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| /linux/drivers/media/platform/samsung/s5p-mfc/ |
| H A D | s5p_mfc_opr_v5.c | 40 ctx->dsc.size = buf_size->dsc; in s5p_mfc_alloc_dec_temp_buffers_v5() 41 ret = s5p_mfc_alloc_priv_buf(dev, BANK_L_CTX, &ctx->dsc); in s5p_mfc_alloc_dec_temp_buffers_v5() 47 BUG_ON(ctx->dsc.dma & ((1 << MFC_BANK1_ALIGN_ORDER) - 1)); in s5p_mfc_alloc_dec_temp_buffers_v5() 48 memset(ctx->dsc.virt, 0, ctx->dsc.size); in s5p_mfc_alloc_dec_temp_buffers_v5() 57 s5p_mfc_release_priv_buf(ctx->dev, &ctx->dsc); in s5p_mfc_release_dec_desc_buffer_v5() 350 mfc_write(dev, OFFSETA(ctx->dsc.dma), S5P_FIMV_SI_CH0_DESC_ADR); in s5p_mfc_set_dec_desc_buffer() 351 mfc_write(dev, buf_size->dsc, S5P_FIMV_SI_CH0_DESC_SIZE); in s5p_mfc_set_dec_desc_buffer()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_utils.c | 341 …if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.dsc.ena… in dml2_core_utils_get_stream_output_bpp() 357 …>stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.dsc.enable == dml2_dsc_… in dml2_core_utils_get_stream_output_bpp() 358 …>stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.dsc.dsc_compressed_bpp_… in dml2_core_utils_get_stream_output_bpp() 364 …display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.dsc.enable); in dml2_core_utils_get_stream_output_bpp()
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