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Searched refs:dsc (Results 1 – 25 of 83) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn35/
H A Ddcn35_dsc.c30 static void dsc35_enable(struct display_stream_compressor *dsc, int opp_pipe);
59 dsc->ctx->logger
61 void dsc35_construct(struct dcn20_dsc *dsc, in dsc35_construct() argument
68 dsc->base.ctx = ctx; in dsc35_construct()
69 dsc->base.inst = inst; in dsc35_construct()
70 dsc->base.funcs = &dcn35_dsc_funcs; in dsc35_construct()
72 dsc->dsc_regs = dsc_regs; in dsc35_construct()
73 dsc->dsc_shift = (const struct dcn20_dsc_shift *)(dsc_shift); in dsc35_construct()
74 dsc->dsc_mask = (const struct dcn20_dsc_mask *)(dsc_mask); in dsc35_construct()
76 dsc->max_image_width = 5184; in dsc35_construct()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
H A Ddcn401_dsc.c12 static void dsc_write_to_registers(struct display_stream_compressor *dsc, const struct dsc_reg_valu…
43 dsc->ctx->logger
48 void dsc401_construct(struct dcn401_dsc *dsc, in dsc401_construct() argument
55 dsc->base.ctx = ctx; in dsc401_construct()
56 dsc->base.inst = inst; in dsc401_construct()
57 dsc->base.funcs = &dcn401_dsc_funcs; in dsc401_construct()
59 dsc->dsc_regs = dsc_regs; in dsc401_construct()
60 dsc->dsc_shift = dsc_shift; in dsc401_construct()
61 dsc->dsc_mask = dsc_mask; in dsc401_construct()
63 dsc->max_image_width = 5184; in dsc401_construct()
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H A Ddcn401_dsc.h13 #define TO_DCN401_DSC(dsc)\ argument
14 container_of(dsc, struct dcn401_dsc, base)
328 void dsc401_construct(struct dcn401_dsc *dsc,
337 void dsc401_read_state(struct display_stream_compressor *dsc, struct dcn_dsc_state *s);
338 bool dsc401_validate_stream(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg…
339 void dsc401_set_config(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
341 void dsc401_enable(struct display_stream_compressor *dsc, int opp_pipe);
342 void dsc401_disable(struct display_stream_compressor *dsc);
343 void dsc401_disconnect(struct display_stream_compressor *dsc);
344 void dsc401_wait_disconnect_pending_clear(struct display_stream_compressor *dsc);
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
H A Ddcn20_dsc.c33 static void dsc_write_to_registers(struct display_stream_compressor *dsc, const struct dsc_reg_valu…
59 dsc->ctx->logger
63 void dsc2_construct(struct dcn20_dsc *dsc, in dsc2_construct() argument
70 dsc->base.ctx = ctx; in dsc2_construct()
71 dsc->base.inst = inst; in dsc2_construct()
72 dsc->base.funcs = &dcn20_dsc_funcs; in dsc2_construct()
74 dsc->dsc_regs = dsc_regs; in dsc2_construct()
75 dsc->dsc_shift = dsc_shift; in dsc2_construct()
76 dsc->dsc_mask = dsc_mask; in dsc2_construct()
78 dsc->max_image_width = 5184; in dsc2_construct()
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/linux/drivers/gpu/drm/panel/
H A Dpanel-novatek-nt37801.c23 struct drm_dsc_config dsc; member
146 drm_dsc_pps_payload_pack(&pps, &ctx->dsc); in novatek_nt37801_prepare()
291 dsi->dsc = &ctx->dsc; in novatek_nt37801_probe()
292 ctx->dsc.dsc_version_major = 1; in novatek_nt37801_probe()
293 ctx->dsc.dsc_version_minor = 1; in novatek_nt37801_probe()
294 ctx->dsc.slice_height = 40; in novatek_nt37801_probe()
295 ctx->dsc.slice_width = 720; in novatek_nt37801_probe()
296 ctx->dsc.slice_count = 1440 / ctx->dsc.slice_width; in novatek_nt37801_probe()
297 ctx->dsc.bits_per_component = 8; in novatek_nt37801_probe()
298 ctx->dsc.bits_per_pixel = 8 << 4; /* 4 fractional bits */ in novatek_nt37801_probe()
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H A Dpanel-himax-hx83121a.c34 struct drm_dsc_config dsc; member
116 drm_dsc_pps_payload_pack(&pps, &ctx->dsc); in himax_prepare()
617 ctx->dsc = *desc->dsc_cfg; in himax_probe()
665 ctx->dsi[i]->dsc = enable_dsc ? &ctx->dsc : NULL; in himax_probe()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_vdsc.c317 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in is_dsi_dsc_1_1()
327 struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config; in intel_dsc_compute_params()
328 u16 compressed_bpp = fxp_q4_to_int(pipe_config->dsc.compressed_bpp_x16); in intel_dsc_compute_params()
335 intel_dsc_line_slice_count(&pipe_config->dsc.slice_config)); in intel_dsc_compute_params()
360 vdsc_cfg->bits_per_pixel = pipe_config->dsc.compressed_bpp_x16; in intel_dsc_compute_params()
430 crtc_state->dsc.compression_enabled_on_link = true; in intel_dsc_enable_on_crtc()
431 crtc_state->dsc.compression_enable = true; in intel_dsc_enable_on_crtc()
438 drm_WARN_ON(display->drm, crtc_state->dsc.compression_enable && in intel_dsc_enabled_on_link()
439 !crtc_state->dsc.compression_enabled_on_link); in intel_dsc_enabled_on_link()
441 return crtc_state->dsc.compression_enabled_on_link; in intel_dsc_enabled_on_link()
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H A Dintel_dp.c1457 bool dsc = false; in intel_dp_mode_valid() local
1533 dsc = dsc_max_compressed_bpp && dsc_slice_count; in intel_dp_mode_valid()
1540 dsc = intel_dp_mode_valid_with_dsc(connector, in intel_dp_mode_valid()
1549 if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc) { in intel_dp_mode_valid()
1554 if (mode_rate > max_rate && !dsc) { in intel_dp_mode_valid()
1563 if (!dsc) in intel_dp_mode_valid()
1977 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in intel_dp_dsc_compute_params()
2109 intel_dsc_line_slice_count(&pipe_config->dsc.slice_config); in dsc_compute_link_config()
2309 pipe_config->dsc.compressed_bpp_x16 = max_bpp_x16; in dsc_compute_compressed_bpp()
2324 pipe_config->dsc.compressed_bpp_x16 = bpp_x16; in dsc_compute_compressed_bpp()
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/linux/drivers/gpu/drm/amd/display/dc/dsc/
H A Ddc_dsc.c37 dsc->ctx->logger
156 const struct display_stream_compressor *dsc,
177 const struct display_stream_compressor *dsc,
459 const struct display_stream_compressor *dsc, in dc_dsc_compute_bandwidth_range() argument
479 get_dsc_enc_caps(dsc, &dsc_enc_caps, timing->pix_clk_100hz); in dc_dsc_compute_bandwidth_range()
481 min_dsc_slice_count = get_min_dsc_slice_count_for_odm(dsc, &dsc_enc_caps, timing); in dc_dsc_compute_bandwidth_range()
497 void dc_dsc_dump_encoder_caps(const struct display_stream_compressor *dsc, in dc_dsc_dump_encoder_caps() argument
502 get_dsc_enc_caps(dsc, &dsc_enc_caps, timing->pix_clk_100hz); in dc_dsc_dump_encoder_caps()
516 void dc_dsc_dump_decoder_caps(const struct display_stream_compressor *dsc, in dc_dsc_dump_decoder_caps() argument
586 const struct display_stream_compressor *dsc, in build_dsc_enc_caps() argument
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H A DMakefile11 AMD_DISPLAY_FILES += $(addprefix $(AMDDALPATH)/dc/dsc/dcn20/,$(DSC_DCN20))
22 AMD_DISPLAY_FILES += $(addprefix $(AMDDALPATH)/dc/dsc/dcn35/,$(DSC_DCN35))
30 AMD_DISPLAY_FILES += $(addprefix $(AMDDALPATH)/dc/dsc/dcn401/,$(DSC_DCN401))
36 AMD_DAL_DSC = $(addprefix $(AMDDALPATH)/dc/dsc/,$(DSC))
/linux/drivers/gpu/drm/msm/dsi/
H A Ddsi_host.c37 static int dsi_populate_dsc_params(struct msm_dsi_host *msm_host, struct drm_dsc_config *dsc);
168 struct drm_dsc_config *dsc; member
590 const struct drm_dsc_config *dsc, in dsi_adjust_pclk_for_compression() argument
605 new_hdisplay = DIV_ROUND_UP(hdisplay * drm_dsc_get_bpp_int(dsc), in dsi_adjust_pclk_for_compression()
606 dsc->bits_per_component * 3); in dsi_adjust_pclk_for_compression()
617 const struct drm_dsc_config *dsc, bool is_bonded_dsi) in dsi_get_pclk_rate() argument
623 if (dsc) in dsi_get_pclk_rate()
624 pclk_rate = dsi_adjust_pclk_for_compression(mode, dsc, is_bonded_dsi); in dsi_get_pclk_rate()
644 unsigned long pclk_rate = dsi_get_pclk_rate(mode, msm_host->dsc, is_bonded_dsi); in dsi_byte_clk_get_rate()
663 msm_host->pixel_clk_rate = dsi_get_pclk_rate(msm_host->mode, msm_host->dsc, is_bonded_dsi); in dsi_calc_pclk()
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/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_dsc.h72 const struct display_stream_compressor *dsc,
82 const struct display_stream_compressor *dsc,
98 void dc_dsc_dump_decoder_caps(const struct display_stream_compressor *dsc,
100 void dc_dsc_dump_encoder_caps(const struct display_stream_compressor *dsc,
/linux/drivers/gpu/drm/tests/
H A Ddrm_dp_mst_helper_test.c18 const bool dsc; member
26 .dsc = false,
32 .dsc = false,
38 .dsc = false,
44 .dsc = true,
50 .dsc = true,
65 sprintf(desc, "Clock %d BPP %d DSC %s", t->clock, t->bpp, t->dsc ? "enabled" : "disabled"); in dp_mst_calc_pbn_mode_desc()
/linux/drivers/net/ethernet/broadcom/
H A Dsb1250-mac.c773 struct sbdmadscr *dsc; in sbdma_add_rcvbuffer() local
780 dsc = d->sbdma_addptr; in sbdma_add_rcvbuffer()
837 dsc->dscr_a = virt_to_phys(sb_new->data) | in sbdma_add_rcvbuffer()
840 dsc->dscr_a = virt_to_phys(sb_new->data) | in sbdma_add_rcvbuffer()
846 dsc->dscr_b = 0; in sbdma_add_rcvbuffer()
852 d->sbdma_ctxtable[dsc-d->sbdma_dscrtable] = sb_new; in sbdma_add_rcvbuffer()
887 struct sbdmadscr *dsc; in sbdma_add_txbuffer() local
895 dsc = d->sbdma_addptr; in sbdma_add_txbuffer()
926 dsc->dscr_a = phys | in sbdma_add_txbuffer()
935 dsc->dscr_b = V_DMA_DSCRB_OPTIONS(K_DMA_ETHTX_APPENDCRC_APPENDPAD) | in sbdma_add_txbuffer()
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/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_dpms.c614 static void dsc_optc_config_log(struct display_stream_compressor *dsc, in dsc_optc_config_log() argument
621 DC_LOGGER_INIT(dsc->ctx->logger); in dsc_optc_config_log()
671 struct display_stream_compressor *dsc = pipe_ctx->stream_res.dsc; in link_set_dsc_on_stream() local
688 DC_LOGGER_INIT(dsc->ctx->logger); in link_set_dsc_on_stream()
711 dccg->funcs->set_dto_dscclk(dccg, dsc->inst, dsc_cfg.dc_dsc_cfg.num_slices_h); in link_set_dsc_on_stream()
712 dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg); in link_set_dsc_on_stream()
713 dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst); in link_set_dsc_on_stream()
715 struct display_stream_compressor *odm_dsc = odm_pipe->stream_res.dsc; in link_set_dsc_on_stream()
731 dsc_optc_config_log(dsc, &dsc_optc_cfg); in link_set_dsc_on_stream()
743 dsc_optc_config_log(dsc, &dsc_optc_cfg); in link_set_dsc_on_stream()
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/linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.c1093 struct dcn20_dsc *dsc = in dcn20_dsc_create() local
1096 if (!dsc) { in dcn20_dsc_create()
1101 dsc2_construct(dsc, ctx, inst, &dsc_regs[inst], &dsc_shift, &dsc_mask); in dcn20_dsc_create()
1102 return &dsc->base; in dcn20_dsc_create()
1105 void dcn20_dsc_destroy(struct display_stream_compressor **dsc) in dcn20_dsc_destroy() argument
1107 kfree(container_of(*dsc, struct dcn20_dsc, base)); in dcn20_dsc_destroy()
1108 *dsc = NULL; in dcn20_dsc_destroy()
1364 struct display_stream_compressor **dsc, in dcn20_acquire_dsc() argument
1369 … display_stream_compressor *dsc_old = dc->current_state->res_ctx.pipe_ctx[pipe_idx].stream_res.dsc; in dcn20_acquire_dsc()
1371 ASSERT(*dsc == NULL); /* If this ASSERT fails, dsc was not released properly */ in dcn20_acquire_dsc()
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/linux/include/drm/display/
H A Ddrm_dsc_helper.h30 u8 drm_dsc_initial_scale_value(const struct drm_dsc_config *dsc);
31 u32 drm_dsc_flatness_det_thresh(const struct drm_dsc_config *dsc);
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_dsc.h37 struct drm_dsc_config *dsc,
47 struct drm_dsc_config *dsc);
H A Ddpu_encoder.c217 struct drm_dsc_config *dsc; member
303 return dpu_enc->dsc ? true : false; in dpu_encoder_is_dsc_enabled()
668 struct drm_dsc_config *dsc; in dpu_encoder_update_topology() local
676 dsc = dpu_encoder_get_dsc_config(drm_enc); in dpu_encoder_update_topology()
679 if (dsc) { in dpu_encoder_update_topology()
1345 dpu_enc->dsc = dpu_encoder_get_dsc_config(drm_enc); in dpu_encoder_virt_atomic_enable()
1967 dpu_encoder_dsc_initial_line_calc(struct drm_dsc_config *dsc, in dpu_encoder_dsc_initial_line_calc() argument
1972 soft_slice_per_enc = enc_ip_width / dsc->slice_width; in dpu_encoder_dsc_initial_line_calc()
1984 ssm_delay = ((dsc->bits_per_component < 10) ? 84 : 92); in dpu_encoder_dsc_initial_line_calc()
1985 total_pixels = ssm_delay * 3 + dsc->initial_xmit_delay + 47; in dpu_encoder_dsc_initial_line_calc()
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/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_hw_sequencer.c2285 struct display_stream_compressor *dsc = params->dsc_set_config_params.dsc; in hwss_dsc_set_config() local
2289 if (dsc && dsc->funcs->dsc_set_config) in hwss_dsc_set_config()
2290 dsc->funcs->dsc_set_config(dsc, dsc_cfg, dsc_optc_cfg); in hwss_dsc_set_config()
2295 struct display_stream_compressor *dsc = params->dsc_enable_params.dsc; in hwss_dsc_enable() local
2298 if (dsc && dsc->funcs->dsc_enable) in hwss_dsc_enable()
2299 dsc->funcs->dsc_enable(dsc, opp_inst); in hwss_dsc_enable()
2326 struct display_stream_compressor *dsc = params->dsc_disconnect_params.dsc; in hwss_dsc_disconnect() local
2328 if (dsc && dsc->funcs->dsc_disconnect) in hwss_dsc_disconnect()
2329 dsc->funcs->dsc_disconnect(dsc); in hwss_dsc_disconnect()
2334 struct display_stream_compressor *dsc = params->dsc_read_state_params.dsc; in hwss_dsc_read_state() local
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/linux/drivers/net/ethernet/mellanox/mlx5/core/en_accel/
H A Dktls_stats.c50 #define MLX5E_READ_CTR_ATOMIC64(ptr, dsc, i) \ argument
51 atomic64_read((atomic64_t *)((char *)(ptr) + (dsc)[i].offset))
H A Dipsec_stats.c61 #define MLX5E_READ_CTR_ATOMIC64(ptr, dsc, i) \ argument
62 atomic64_read((atomic64_t *)((char *)(ptr) + (dsc)[i].offset))
/linux/arch/mips/mm/
H A Dcerr-sb1.c466 struct dc_state *dsc = dc_states; in dc_state_str() local
467 while (dsc->val != 0xff) { in dc_state_str()
468 if (dsc->val == state) in dc_state_str()
470 dsc++; in dc_state_str()
472 return dsc->name; in dc_state_str()
/linux/drivers/scsi/qla2xxx/
H A Dqla_mid.c1136 int qla_get_buf(struct scsi_qla_host *vha, struct qla_qpair *qp, struct qla_buf_dsc *dsc) in qla_get_buf() argument
1143 dsc->tag = TAG_FREED; in qla_get_buf()
1170 dsc->buf = qp->buf_pool.buf_array[tag] = buf; in qla_get_buf()
1171 dsc->buf_dma = qp->buf_pool.dma_array[tag] = buf_dma; in qla_get_buf()
1174 dsc->buf = qp->buf_pool.buf_array[tag]; in qla_get_buf()
1175 dsc->buf_dma = qp->buf_pool.dma_array[tag]; in qla_get_buf()
1176 memset(dsc->buf, 0, FCP_CMND_DMA_POOL_SIZE); in qla_get_buf()
1183 dsc->tag = tag; in qla_get_buf()
1242 void qla_put_buf(struct qla_qpair *qp, struct qla_buf_dsc *dsc) in qla_put_buf() argument
1244 if (dsc->tag == TAG_FREED) in qla_put_buf()
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/linux/sound/pci/ctxfi/
H A Dctdaio.c446 struct daio_desc dsc = {0}; in dao_rsc_reinit() local
448 dsc.type = dao->daio.type; in dao_rsc_reinit()
449 dsc.msr = desc->msr; in dao_rsc_reinit()
450 dsc.passthru = desc->passthru; in dao_rsc_reinit()
451 dsc.output = dao->daio.output; in dao_rsc_reinit()
453 return dao_rsc_init(dao, &dsc, mgr); in dao_rsc_reinit()

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