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Searched refs:drm_dbg_kms (Results 1 – 25 of 98) sorted by relevance

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/linux/drivers/gpu/drm/i915/display/
H A Dintel_dsi_vbt.c111 drm_dbg_kms(&dev_priv->drm, "\n"); in mipi_exec_send_packet()
128 drm_dbg_kms(&dev_priv->drm, "no dsi device for port %c\n", in mipi_exec_send_packet()
188 drm_dbg_kms(&i915->drm, "%d usecs\n", delay); in mipi_exec_delay()
250 drm_dbg_kms(&dev_priv->drm, "SC gpio not supported\n"); in vlv_gpio_set_value()
254 drm_dbg_kms(&dev_priv->drm, in vlv_gpio_set_value()
287 drm_dbg_kms(&dev_priv->drm, in chv_gpio_set_value()
293 drm_dbg_kms(&dev_priv->drm, in chv_gpio_set_value()
419 drm_dbg_kms(&i915->drm, "GPIO index %u, number %u, source %u, native %s, set to %s\n", in mipi_exec_gpio()
497 drm_dbg_kms(&i915->drm, "bus %d target-addr 0x%02x reg 0x%02x data %*ph\n", in mipi_exec_i2c()
540 drm_dbg_kms(&i915->drm, "Skipping SPI element execution\n"); in mipi_exec_spi()
[all …]
H A Dintel_lspcon.c99 drm_dbg_kms(display->drm, "Vendor: Mega Chips\n"); in lspcon_detect_vendor()
104 drm_dbg_kms(display->drm, "Vendor: Parade Tech\n"); in lspcon_detect_vendor()
134 drm_dbg_kms(display->drm, "HDR capability detection failed\n"); in lspcon_detect_hdr_capability()
137 drm_dbg_kms(display->drm, "LSPCON capable of HDR\n"); in lspcon_detect_hdr_capability()
150 drm_dbg_kms(display->drm, "Error reading LSPCON mode\n"); in lspcon_get_current_mode()
179 drm_dbg_kms(display->drm, "Waiting for LSPCON mode %s to settle\n", in lspcon_wait_mode()
188 drm_dbg_kms(display->drm, "Current LSPCON mode %s\n", in lspcon_wait_mode()
210 drm_dbg_kms(display->drm, "Current mode = desired LSPCON mode\n"); in lspcon_change_mode()
221 drm_dbg_kms(display->drm, "LSPCON mode changed done\n"); in lspcon_change_mode()
233 drm_dbg_kms(display->drm, "Native AUX CH down\n"); in lspcon_wake_native_aux_ch()
[all …]
H A Dintel_bios.c387 drm_dbg_kms(display->drm, "Generating LFP data table pointers\n"); in generate_lfp_data_ptrs()
499 drm_dbg_kms(display->drm, in init_bdb_block()
574 drm_dbg_kms(display->drm, "reducing hsync_end %d->%d\n", in fill_detail_timing_data()
579 drm_dbg_kms(display->drm, "reducing vsync_end %d->%d\n", in fill_detail_timing_data()
643 drm_dbg_kms(display->drm, "Invalid VBT panel type 0x%x\n", in vbt_get_panel_type()
759 drm_dbg_kms(display->drm, "Panel type (%s): %d\n", in get_panel_type()
774 drm_dbg_kms(display->drm, "Selected panel type (%s): %d\n", in get_panel_type()
823 drm_dbg_kms(display->drm, "DRRS supported mode is static\n"); in parse_panel_options()
827 drm_dbg_kms(display->drm, in parse_panel_options()
832 drm_dbg_kms(display->drm, in parse_panel_options()
[all …]
H A Dintel_hdcp_gsc_message.c49 drm_dbg_kms(display->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); in intel_hdcp_gsc_initiate_session()
54 drm_dbg_kms(display->drm, "FW cmd 0x%08X Failed. Status: 0x%X\n", in intel_hdcp_gsc_initiate_session()
111 drm_dbg_kms(display->drm, "intel_hdcp_gsc_msg_send failed: %zd\n", byte); in intel_hdcp_gsc_verify_receiver_cert_prepare_km()
116 drm_dbg_kms(display->drm, "FW cmd 0x%08X Failed. Status: 0x%X\n", in intel_hdcp_gsc_verify_receiver_cert_prepare_km()
174 drm_dbg_kms(display->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); in intel_hdcp_gsc_verify_hprime()
179 drm_dbg_kms(display->drm, "FW cmd 0x%08X Failed. Status: 0x%X\n", in intel_hdcp_gsc_verify_hprime()
225 drm_dbg_kms(display->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); in intel_hdcp_gsc_store_pairing_info()
230 drm_dbg_kms(display->drm, "FW cmd 0x%08X failed. Status: 0x%X\n", in intel_hdcp_gsc_store_pairing_info()
272 drm_dbg_kms(display->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); in intel_hdcp_gsc_initiate_locality_check()
277 drm_dbg_kms(display->drm, "FW cmd 0x%08X Failed. status: 0x%X\n", in intel_hdcp_gsc_initiate_locality_check()
[all …]
H A Dintel_hdcp.c197 drm_dbg_kms(display->drm, "Bksv is invalid\n"); in intel_hdcp_read_valid_bksv()
673 drm_dbg_kms(display->drm, "Invalid number of leftovers %d\n", in intel_hdcp_validate_v_prime()
706 drm_dbg_kms(display->drm, "SHA-1 mismatch, HDCP failed\n"); in intel_hdcp_validate_v_prime()
725 drm_dbg_kms(display->drm, in intel_hdcp_auth_downstream()
736 drm_dbg_kms(display->drm, "Max Topology Limit Exceeded\n"); in intel_hdcp_auth_downstream()
749 drm_dbg_kms(display->drm, in intel_hdcp_auth_downstream()
756 drm_dbg_kms(display->drm, "Out of mem: ksv_fifo\n"); in intel_hdcp_auth_downstream()
784 drm_dbg_kms(display->drm, in intel_hdcp_auth_downstream()
789 drm_dbg_kms(display->drm, "HDCP is enabled (%d downstream devices)\n", in intel_hdcp_auth_downstream()
833 drm_dbg_kms(display->drm, in intel_hdcp_auth()
[all …]
H A Dintel_fdi.c200 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
204 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
212 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
239 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
247 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
260 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
441 drm_dbg_kms(&dev_priv->drm, "%sabling fdi C rx\n", in cpt_set_fdi_bc_bifurcation()
568 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ilk_fdi_link_train()
571 drm_dbg_kms(&dev_priv->drm, "FDI train 1 done.\n"); in ilk_fdi_link_train()
590 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ilk_fdi_link_train()
[all …]
H A Dintel_psr.c407 drm_dbg_kms(display->drm, "PSR exit events: 0x%x\n", val); in psr_event_print()
409 drm_dbg_kms(display->drm, "\tPSR2 watchdog timer expired\n"); in psr_event_print()
411 drm_dbg_kms(display->drm, "\tPSR2 disabled\n"); in psr_event_print()
413 drm_dbg_kms(display->drm, "\tSU dirty FIFO underrun\n"); in psr_event_print()
415 drm_dbg_kms(display->drm, "\tSU CRC FIFO underrun\n"); in psr_event_print()
417 drm_dbg_kms(display->drm, "\tGraphics reset\n"); in psr_event_print()
419 drm_dbg_kms(display->drm, "\tPCH interrupt\n"); in psr_event_print()
421 drm_dbg_kms(display->drm, "\tMemory up\n"); in psr_event_print()
423 drm_dbg_kms(display->drm, "\tFront buffer modification\n"); in psr_event_print()
425 drm_dbg_kms(display->drm, "\tPSR watchdog timer expired\n"); in psr_event_print()
[all …]
H A Dintel_dp_hdcp.c53 drm_dbg_kms(connector->base.dev, in intel_dp_hdcp_wait_for_cp_irq()
69 drm_dbg_kms(display->drm, in intel_dp_hdcp_write_an_aksv()
85 drm_dbg_kms(display->drm, in intel_dp_hdcp_write_an_aksv()
102 drm_dbg_kms(display->drm, in intel_dp_hdcp_read_bksv()
123 drm_dbg_kms(display->drm, in intel_dp_hdcp_read_bstatus()
140 drm_dbg_kms(display->drm, in intel_dp_hdcp_read_bcaps()
174 drm_dbg_kms(display->drm, in intel_dp_hdcp_read_ri_prime()
193 drm_dbg_kms(display->drm, in intel_dp_hdcp_read_ksv_ready()
217 drm_dbg_kms(display->drm, in intel_dp_hdcp_read_ksv_fifo()
240 drm_dbg_kms(display->drm, in intel_dp_hdcp_read_v_prime_part()
[all …]
H A Dintel_load_detect.c62 drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s], [ENCODER:%d:%s]\n", in intel_load_detect_get_pipe()
113 drm_dbg_kms(display->drm, in intel_load_detect_get_pipe()
166 drm_dbg_kms(display->drm, in intel_load_detect_get_pipe()
174 drm_dbg_kms(display->drm, in intel_load_detect_get_pipe()
212 drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s], [ENCODER:%d:%s]\n", in intel_load_detect_release_pipe()
221 drm_dbg_kms(display->drm, in intel_load_detect_release_pipe()
H A Dintel_dp_tunnel.c84 drm_dbg_kms(display->drm, in update_tunnel_state()
106 drm_dbg_kms(display->drm, in update_tunnel_state()
137 drm_dbg_kms(display->drm, in allocate_initial_tunnel_bw_for_pipes()
148 drm_dbg_kms(display->drm, in allocate_initial_tunnel_bw_for_pipes()
192 drm_dbg_kms(display->drm, in detect_new_tunnel()
276 drm_dbg_kms(display->drm, in intel_dp_tunnel_suspend()
311 drm_dbg_kms(display->drm, in intel_dp_tunnel_resume()
352 drm_dbg_kms(display->drm, in intel_dp_tunnel_resume()
427 drm_dbg_kms(display->drm, in check_inherited_tunnel_state()
518 drm_dbg_kms(display->drm, in check_group_state()
[all …]
H A Dintel_backlight.c108 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] set backlight PWM = %d\n", in intel_backlight_set_pwm_level()
288 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] set backlight level = %d\n", in intel_panel_actually_set_backlight()
351 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] CPU backlight was enabled, disabling\n", in lpt_disable_backlight()
450 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] Skipping backlight disable on vga switch\n", in intel_backlight_disable()
475 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] PCH backlight already enabled\n", in lpt_enable_backlight()
520 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] CPU backlight already enabled\n", in pch_enable_backlight()
528 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] PCH backlight already enabled\n", in pch_enable_backlight()
567 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] backlight already enabled\n", in i9xx_enable_backlight()
608 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] backlight already enabled\n", in i965_enable_backlight()
644 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] backlight already enabled\n", in vlv_enable_backlight()
[all …]
H A Dintel_pps.c111 drm_dbg_kms(display->drm, in vlv_power_sequencer_kick()
235 drm_dbg_kms(display->drm, in vlv_power_sequencer_pipe()
342 drm_dbg_kms(display->drm, in vlv_initial_power_sequencer_setup()
348 drm_dbg_kms(display->drm, in vlv_initial_power_sequencer_setup()
435 drm_dbg_kms(display->drm, in pps_initial_setup()
440 drm_dbg_kms(display->drm, in pps_initial_setup()
589 drm_dbg_kms(display->drm, in intel_pps_check_power_unlocked()
623 drm_dbg_kms(display->drm, in wait_panel_status()
639 drm_dbg_kms(display->drm, "Wait complete\n"); in wait_panel_status()
647 drm_dbg_kms(display->drm, in wait_panel_on()
[all …]
H A Dintel_hdmi.c698 drm_dbg_kms(encoder->base.dev, in intel_read_infoframe()
704 drm_dbg_kms(encoder->base.dev, in intel_read_infoframe()
851 drm_dbg_kms(display->drm, in intel_hdmi_compute_drm_infoframe()
892 drm_dbg_kms(display->drm, in g4x_set_infoframes()
906 drm_dbg_kms(display->drm, in g4x_set_infoframes()
1291 drm_dbg_kms(display->drm, "%s DP dual mode adaptor TMDS output\n", in intel_dp_dual_mode_set_tmds_output()
1368 drm_dbg_kms(display->drm, "Write An over DDC failed (%d)\n", in intel_hdmi_hdcp_write_an_aksv()
1375 drm_dbg_kms(display->drm, "Failed to output aksv (%d)\n", ret); in intel_hdmi_hdcp_write_an_aksv()
1390 drm_dbg_kms(display->drm, "Read Bksv over DDC failed (%d)\n", in intel_hdmi_hdcp_read_bksv()
1405 drm_dbg_kms(display->drm, in intel_hdmi_hdcp_read_bstatus()
[all …]
H A Dintel_dp.c826 drm_dbg_kms(&i915->drm, "Unsupported BPP %u, min %u\n", in intel_dp_dsc_nearest_valid_bpp()
844 drm_dbg_kms(&i915->drm, "Unsupported BPP %u, min 8\n", in intel_dp_dsc_nearest_valid_bpp()
855 drm_dbg_kms(&i915->drm, "Set dsc bpp from %d to VESA %d\n", in intel_dp_dsc_nearest_valid_bpp()
970 drm_dbg_kms(&i915->drm, "Max link bpp is %u for %u timeslots " in intel_dp_dsc_get_max_compressed_bpp()
1009 drm_dbg_kms(&i915->drm, in intel_dp_dsc_get_slice_count()
1039 drm_dbg_kms(&i915->drm, "Unsupported Slice Count %d\n", in intel_dp_dsc_get_slice_count()
1135 drm_dbg_kms(&i915->drm, "Cannot force DSC output format\n"); in intel_dp_output_format()
1517 drm_dbg_kms(&i915->drm, "source rates: %s\n", str); in intel_dp_print_rates()
1521 drm_dbg_kms(&i915->drm, "sink rates: %s\n", str); in intel_dp_print_rates()
1525 drm_dbg_kms(&i915->drm, "common rates: %s\n", str); in intel_dp_print_rates()
[all …]
H A Dintel_dp_aux_backlight.c125 drm_dbg_kms(display->drm, in intel_dp_aux_supports_hdr_backlight()
276 drm_dbg_kms(display->drm, in intel_dp_aux_write_content_luminance()
400 drm_dbg_kms(display->drm, in intel_dp_aux_write_panel_luminance_override()
414 drm_dbg_kms(display->drm, in intel_dp_aux_hdr_setup_backlight()
439 drm_dbg_kms(display->drm, in intel_dp_aux_hdr_setup_backlight()
524 drm_dbg_kms(display->drm, in intel_dp_aux_vesa_setup_backlight()
528 drm_dbg_kms(display->drm, in intel_dp_aux_vesa_setup_backlight()
565 drm_dbg_kms(display->drm, in intel_dp_aux_vesa_setup_backlight()
579 drm_dbg_kms(display->drm, in intel_dp_aux_supports_vesa_backlight()
656 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Using Intel proprietary eDP backlight controls\n", in intel_dp_aux_init_backlight_funcs()
[all …]
H A Dintel_display_power_well.c101 drm_dbg_kms(&i915->drm, "enabling %s\n", intel_power_well_name(power_well)); in intel_power_well_enable()
109 drm_dbg_kms(&i915->drm, "disabling %s\n", intel_power_well_name(power_well)); in intel_power_well_disable()
282 drm_dbg_kms(&dev_priv->drm, "%s power well enable timeout\n", in hsw_wait_for_power_well_enable()
329 drm_dbg_kms(&dev_priv->drm, in hsw_wait_for_power_well_disable()
500 drm_dbg_kms(&i915->drm, "TC cold block %s\n", ret ? "failed" : in icl_tc_cold_exit()
687 drm_dbg_kms(display->drm, in gen9_write_dc_state()
722 drm_dbg_kms(display->drm, in gen9_sanitize_dc_state()
766 drm_dbg_kms(display->drm, "Setting DC state from %02x to %02x\n", in gen9_set_dc_state()
784 drm_dbg_kms(display->drm, "Enabling DC3CO\n"); in tgl_enable_dc3co()
790 drm_dbg_kms(display->drm, "Disabling DC3CO\n"); in tgl_disable_dc3co()
[all …]
/linux/drivers/gpu/drm/
H A Ddrm_framebuffer.c90 drm_dbg_kms(fb->dev, "Invalid source coordinates " in drm_framebuffer_check_src_coords()
129 drm_dbg_kms(dev, "bad {bpp:%d, depth:%d}\n", or->bpp, or->depth); in drm_mode_addfb()
163 drm_dbg_kms(dev, "bad framebuffer format %p4cc\n", in framebuffer_check()
169 drm_dbg_kms(dev, "bad framebuffer width %u\n", r->width); in framebuffer_check()
174 drm_dbg_kms(dev, "bad framebuffer height %u\n", r->height); in framebuffer_check()
188 drm_dbg_kms(dev, "Format requires non-linear modifier for plane %d\n", i); in framebuffer_check()
193 drm_dbg_kms(dev, "no buffer object handle for plane %d\n", i); in framebuffer_check()
204 drm_dbg_kms(dev, "bad pitch %u for plane %d\n", r->pitches[i], i); in framebuffer_check()
209 drm_dbg_kms(dev, "bad fb modifier %llu for plane %d\n", in framebuffer_check()
216 drm_dbg_kms(dev, "bad fb modifier %llu for plane %d\n", in framebuffer_check()
[all …]
H A Ddrm_client_modeset.c251 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] enabled? %s\n", in drm_client_connectors_enabled()
314 drm_dbg_kms(dev, "can clone using command line\n"); in drm_client_target_cloned()
343 drm_dbg_kms(dev, "can clone using 1024x768\n"); in drm_client_target_cloned()
369 drm_dbg_kms(dev, in drm_client_get_tile_offsets()
382 drm_dbg_kms(dev, "returned %d %d for %d %d\n", hoffset, voffset, h_idx, v_idx); in drm_client_get_tile_offsets()
441 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] looking for cmdline mode\n", in drm_client_target_preferred()
447 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] looking for preferred mode, tile %d\n", in drm_client_target_preferred()
469 drm_dbg_kms(dev, in drm_client_target_preferred()
478 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Found mode %s\n", in drm_client_target_preferred()
640 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] not enabled, skipping\n", in drm_client_firmware_config()
[all …]
H A Ddrm_crtc_helper.c341 drm_dbg_kms(dev, "[ENCODER:%d:%s] mode fixup failed\n", in drm_crtc_helper_set_mode()
351 drm_dbg_kms(dev, "[CRTC:%d:%s] mode fixup failed\n", in drm_crtc_helper_set_mode()
356 drm_dbg_kms(dev, "[CRTC:%d:%s]\n", crtc->base.id, crtc->name); in drm_crtc_helper_set_mode()
395 drm_dbg_kms(dev, "[ENCODER:%d:%s] set [MODE:%s]\n", in drm_crtc_helper_set_mode()
581 drm_dbg_kms(dev, "\n"); in drm_crtc_helper_set_config()
589 drm_dbg_kms(dev, "[CRTC:%d:%s] [FB:%d] #connectors=%d (x y) (%i %i)\n", in drm_crtc_helper_set_config()
594 drm_dbg_kms(dev, "[CRTC:%d:%s] [NOFB]\n", in drm_crtc_helper_set_config()
645 drm_dbg_kms(dev, "[CRTC:%d:%s] no fb, full mode set\n", in drm_crtc_helper_set_config()
658 drm_dbg_kms(dev, "[CRTC:%d:%s] modes are different, full mode set:\n", in drm_crtc_helper_set_config()
660 drm_dbg_kms(dev, DRM_MODE_FMT "\n", DRM_MODE_ARG(&set->crtc->mode)); in drm_crtc_helper_set_config()
[all …]
H A Ddrm_probe_helper.c484 drm_dbg_kms(dev, in __drm_helper_update_and_validate()
570 drm_dbg_kms(dev, "[CONNECTOR:%d:%s]\n", connector->base.id, in drm_helper_probe_single_connector_modes()
614 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] status updated from %s to %s\n", in drm_helper_probe_single_connector_modes()
640 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] disconnected\n", in drm_helper_probe_single_connector_modes()
699 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] probed modes:\n", in drm_helper_probe_single_connector_modes()
704 drm_dbg_kms(dev, "Probed mode: " DRM_MODE_FMT "\n", in drm_helper_probe_single_connector_modes()
830 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] status updated from %s to %s\n", in output_poll_execute()
833 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] epoch counter %llu -> %llu\n", in output_poll_execute()
988 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Same epoch counter %llu\n", in check_connector_changed()
996 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] status updated from %s to %s\n", in check_connector_changed()
[all …]
H A Ddrm_crtc.c719 drm_dbg_kms(dev, "Unknown CRTC ID %d\n", crtc_req->crtc_id); in drm_mode_setcrtc()
722 drm_dbg_kms(dev, "[CRTC:%d:%s]\n", crtc->base.id, crtc->name); in drm_mode_setcrtc()
745 drm_dbg_kms(dev, "CRTC doesn't have current FB\n"); in drm_mode_setcrtc()
756 drm_dbg_kms(dev, "Unknown FB ID%d\n", in drm_mode_setcrtc()
770 drm_dbg_kms(dev, "Unexpected aspect-ratio flag bits\n"); in drm_mode_setcrtc()
778 drm_dbg_kms(dev, "Invalid mode (%s, %pe): " DRM_MODE_FMT "\n", in drm_mode_setcrtc()
793 drm_dbg_kms(dev, "Invalid pixel format %p4cc, modifier 0x%llx\n", in drm_mode_setcrtc()
808 drm_dbg_kms(dev, "Count connectors is 0 but mode set\n"); in drm_mode_setcrtc()
814 drm_dbg_kms(dev, "Count connectors is %d but no mode or fb set\n", in drm_mode_setcrtc()
847 drm_dbg_kms(dev, "Connector id %d unknown\n", in drm_mode_setcrtc()
[all …]
H A Ddrm_gem_framebuffer_helper.c164 drm_dbg_kms(dev, "Failed to get FB format info\n"); in drm_gem_fb_init_with_funcs()
171 drm_dbg_kms(dev, "Unsupported pixel format %p4cc / modifier 0x%llx\n", in drm_gem_fb_init_with_funcs()
183 drm_dbg_kms(dev, "Failed to lookup GEM object\n"); in drm_gem_fb_init_with_funcs()
193 drm_dbg_kms(dev, in drm_gem_fb_init_with_funcs()
543 drm_dbg_kms(dev, "Invalid AFBC_FORMAT_MOD_BLOCK_SIZE: %lld.\n", in drm_gem_afbc_min_size()
565 drm_dbg_kms(dev, "Invalid AFBC bpp value: %d\n", bpp); in drm_gem_afbc_min_size()
/linux/drivers/gpu/drm/display/
H A Ddrm_scdc_helper.c160 drm_dbg_kms(connector->dev, in drm_scdc_get_scrambling_status()
190 drm_dbg_kms(connector->dev, in drm_scdc_set_scrambling()
203 drm_dbg_kms(connector->dev, in drm_scdc_set_scrambling()
250 drm_dbg_kms(connector->dev, in drm_scdc_set_high_tmds_clock_ratio()
263 drm_dbg_kms(connector->dev, in drm_scdc_set_high_tmds_clock_ratio()
H A Ddrm_dp_helper.c230 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_clock_recovery_delay_us()
242 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_channel_eq_delay_us()
255 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x\n", in __128b132b_channel_eq_delay_us()
330 drm_dbg_kms(aux->drm_dev, "%s: failed rd interval read\n", in __read_delay()
578 drm_dbg_kms(aux->drm_dev, "%s: Too many retries, giving up. First error: %d\n", in drm_dp_dpcd_access()
878 drm_dbg_kms(aux->drm_dev, "%s: Source DUT does not support TEST_EDID_READ\n", in drm_dp_send_real_edid_checksum()
944 drm_dbg_kms(aux->drm_dev, in drm_dp_read_extended_dpcd_caps()
953 drm_dbg_kms(aux->drm_dev, "%s: Base DPCD: %*ph\n", aux->name, DP_RECEIVER_CAP_SIZE, dpcd); in drm_dp_read_extended_dpcd_caps()
988 drm_dbg_kms(aux->drm_dev, "%s: DPCD: %*ph\n", aux->name, DP_RECEIVER_CAP_SIZE, dpcd); in drm_dp_read_dpcd_caps()
1037 drm_dbg_kms(aux->drm_dev, "%s: DPCD DFP: %*ph\n", aux->name, len, downstream_ports); in drm_dp_read_downstream_info()
[all …]
/linux/drivers/gpu/drm/logicvc/
H A Dlogicvc_layer.c215 drm_dbg_kms(drm_dev, "Setting layer %d alpha to %d/%d\n", index, in logicvc_plane_atomic_update()
334 drm_dbg_kms(drm_dev, "Found layer %d buffer setup for 0x%x byte gap:\n", in logicvc_layer_buffer_find_setup()
337 drm_dbg_kms(drm_dev, "- buffer_sel = 0x%x chunks of 0x%x bytes\n", in logicvc_layer_buffer_find_setup()
339 drm_dbg_kms(drm_dev, "- voffset = 0x%x chunks of 0x%x bytes\n", voffset, in logicvc_layer_buffer_find_setup()
341 drm_dbg_kms(drm_dev, "- hoffset = 0x%x chunks of 0x%x bytes\n", hoffset, in logicvc_layer_buffer_find_setup()
508 drm_dbg_kms(drm_dev, "Using layer #%d as background layer\n", in logicvc_layer_init()
535 drm_dbg_kms(drm_dev, "Giving layer #%d zpos %d\n", index, zpos); in logicvc_layer_init()
542 drm_dbg_kms(drm_dev, "Registering layer #%d\n", index); in logicvc_layer_init()

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