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Searched refs:dram_type (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/memory/tegra/
H A Dtegra210-emc-cc-r21021.c371 u32 value, dram_type; in tegra210_emc_r21021_set_clock() local
383 dram_type = value >> EMC_FBIO_CFG5_DRAM_TYPE_SHIFT; in tegra210_emc_r21021_set_clock()
390 dram_type == DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()
393 if (dram_type == DRAM_TYPE_DDR3) in tegra210_emc_r21021_set_clock()
397 (dram_type == DRAM_TYPE_LPDDR2)) in tegra210_emc_r21021_set_clock()
429 emc_dbg(emc, INFO, "DRAM type = %d\n", dram_type); in tegra210_emc_r21021_set_clock()
606 if (src_clk_period > 50000 && dram_type == DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()
617 if (dram_type == DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()
619 else if (dram_type == DRAM_TYPE_LPDDR2 || is_lpddr3) in tegra210_emc_r21021_set_clock()
622 else if (dram_type == DRAM_TYPE_DDR3) in tegra210_emc_r21021_set_clock()
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H A Dtegra124-emc.c490 enum emc_dram_type dram_type; member
629 if (emc->dram_type == DRAM_TYPE_DDR3) in tegra124_emc_prepare_timing_change()
724 if (emc->dram_type == DRAM_TYPE_DDR3 && in tegra124_emc_prepare_timing_change()
751 if (emc->dram_type == DRAM_TYPE_DDR3 && dll_change == DLL_CHANGE_OFF) in tegra124_emc_prepare_timing_change()
757 if (emc->dram_type == DRAM_TYPE_DDR3) in tegra124_emc_prepare_timing_change()
766 if (emc->dram_type == DRAM_TYPE_DDR3) in tegra124_emc_prepare_timing_change()
774 if (emc->dram_type == DRAM_TYPE_DDR3) { in tegra124_emc_prepare_timing_change()
849 if (emc->dram_type == DRAM_TYPE_LPDDR3 && in tegra124_emc_complete_timing_change()
857 if (emc->dram_type == DRAM_TYPE_DDR3 && in tegra124_emc_complete_timing_change()
901 emc->dram_type = readl(emc->regs + EMC_FBIO_CFG5); in emc_init()
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H A Dtegra30-emc.c527 enum emc_dram_type dram_type; in emc_prepare_timing_change() local
572 dram_type = fbio_cfg5 & EMC_FBIO_CFG5_DRAM_TYPE_MASK; in emc_prepare_timing_change()
648 if (dram_type == DRAM_TYPE_DDR3 && dll_change == DLL_CHANGE_ON) { in emc_prepare_timing_change()
701 if (dram_type == DRAM_TYPE_DDR3) { in emc_prepare_timing_change()
731 if (dram_type == DRAM_TYPE_DDR3) in emc_prepare_timing_change()
736 if (dram_type == DRAM_TYPE_DDR3) { in emc_prepare_timing_change()
1120 enum emc_dram_type dram_type; in emc_setup_hw() local
1125 dram_type = fbio_cfg5 & EMC_FBIO_CFG5_DRAM_TYPE_MASK; in emc_setup_hw()
1133 switch (dram_type) { in emc_setup_hw()
1159 switch (dram_type) { in emc_setup_hw()
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H A Dtegra20-emc.c598 enum emc_dram_type dram_type; in emc_setup_hw() local
638 dram_type = FIELD_GET(EMC_FBIO_CFG5_DRAM_TYPE, emc_fbio); in emc_setup_hw()
640 switch (dram_type) { in emc_setup_hw()
662 if (dram_type == DRAM_TYPE_LPDDR2) { in emc_setup_hw()
H A Dtegra210-emc-core.c773 if ((emc->dram_type != DRAM_TYPE_LPDDR2 && in tegra210_emc_set_refresh()
774 emc->dram_type != DRAM_TYPE_LPDDR4) || in tegra210_emc_set_refresh()
1775 emc->dram_type = value & 0x3; in tegra210_emc_detect()
H A Dtegra210-emc.h908 unsigned int dram_type; member
/linux/arch/mips/ralink/
H A Dmt7620.c46 static int dram_type; variable
53 switch (dram_type) { in mt7620_dram_init()
79 switch (dram_type) { in mt7628_dram_init()
233 dram_type = cfg0 & DRAM_TYPE_MT7628_MASK; in prom_soc_init()
235 dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & in prom_soc_init()
237 if (dram_type == SYSCFG0_DRAM_TYPE_UNKNOWN) in prom_soc_init()
238 dram_type = SYSCFG0_DRAM_TYPE_SDRAM; in prom_soc_init()
/linux/drivers/edac/
H A Damd64_edac.c1165 if (pvt->dram_type == MEM_LRDDR3) { in debug_dump_dramcfg_low()
1562 umc->dram_type = MEM_EMPTY; in umc_determine_memory_type()
1572 umc->dram_type = MEM_LRDDR5; in umc_determine_memory_type()
1574 umc->dram_type = MEM_RDDR5; in umc_determine_memory_type()
1576 umc->dram_type = MEM_DDR5; in umc_determine_memory_type()
1579 umc->dram_type = MEM_LRDDR4; in umc_determine_memory_type()
1581 umc->dram_type = MEM_RDDR4; in umc_determine_memory_type()
1583 umc->dram_type = MEM_DDR4; in umc_determine_memory_type()
1586 edac_dbg(1, " UMC%d DIMM type: %s\n", i, edac_mem_types[umc->dram_type]); in umc_determine_memory_type()
1599 pvt->dram_type = (pvt->dclr0 & BIT(18)) ? MEM_DDR : MEM_RDDR; in dct_determine_memory_type()
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H A Daspeed_edac.c234 u32 nr_pages, dram_type; in init_csrows() local
265 dram_type = (reg04 & ASPEED_MCR_CONF_DRAM_TYPE) ? MEM_DDR4 : MEM_DDR3; in init_csrows()
268 dimm->mtype = dram_type; in init_csrows()