Searched refs:dram_type (Results 1 – 6 of 6) sorted by relevance
371 u32 value, dram_type; in tegra210_emc_r21021_set_clock() local383 dram_type = value >> EMC_FBIO_CFG5_DRAM_TYPE_SHIFT; in tegra210_emc_r21021_set_clock()390 dram_type == DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()393 if (dram_type == DRAM_TYPE_DDR3) in tegra210_emc_r21021_set_clock()397 (dram_type == DRAM_TYPE_LPDDR2)) in tegra210_emc_r21021_set_clock()429 emc_dbg(emc, INFO, "DRAM type = %d\n", dram_type); in tegra210_emc_r21021_set_clock()606 if (src_clk_period > 50000 && dram_type == DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()617 if (dram_type == DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()619 else if (dram_type == DRAM_TYPE_LPDDR2 || is_lpddr3) in tegra210_emc_r21021_set_clock()622 else if (dram_type == DRAM_TYPE_DDR3) in tegra210_emc_r21021_set_clock()[all …]
598 enum emc_dram_type dram_type; in emc_setup_hw() local638 dram_type = FIELD_GET(EMC_FBIO_CFG5_DRAM_TYPE, emc_fbio); in emc_setup_hw()640 switch (dram_type) { in emc_setup_hw()662 if (dram_type == DRAM_TYPE_LPDDR2) { in emc_setup_hw()
773 if ((emc->dram_type != DRAM_TYPE_LPDDR2 && in tegra210_emc_set_refresh()774 emc->dram_type != DRAM_TYPE_LPDDR4) || in tegra210_emc_set_refresh()1775 emc->dram_type = value & 0x3; in tegra210_emc_detect()
908 unsigned int dram_type; member
46 static int dram_type; variable53 switch (dram_type) { in mt7620_dram_init()79 switch (dram_type) { in mt7628_dram_init()233 dram_type = cfg0 & DRAM_TYPE_MT7628_MASK; in prom_soc_init()235 dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & in prom_soc_init()237 if (dram_type == SYSCFG0_DRAM_TYPE_UNKNOWN) in prom_soc_init()238 dram_type = SYSCFG0_DRAM_TYPE_SDRAM; in prom_soc_init()
234 u32 nr_pages, dram_type; in init_csrows() local265 dram_type = (reg04 & ASPEED_MCR_CONF_DRAM_TYPE) ? MEM_DDR4 : MEM_DDR3; in init_csrows()268 dimm->mtype = dram_type; in init_csrows()