Searched refs:dram_config (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_dpmm/ |
| H A D | dml2_dpmm_dcn4.c | 10 …_khz(unsigned long long bandwidth_kbps, const struct dml2_dram_params *dram_config, struct dml2_mc… in dram_bw_kbps_to_uclk_khz() argument
14 if (!dram_config->alt_clock_bw_conversion) { in dram_bw_kbps_to_uclk_khz()
17 …uclk_bytes_per_tick = dram_config->channel_count * dram_config->channel_width_bytes * dram_config-… in dram_bw_kbps_to_uclk_khz()
47 &in_out->soc_bb->clk_table.dram_config, &in_out->min_clk_table->dram_bw_table); in get_minimum_clocks_for_latency()
68 &in_out->soc_bb->clk_table.dram_config, &in_out->min_clk_table->dram_bw_table); in calculate_system_active_minimums()
73 &in_out->soc_bb->clk_table.dram_config, &in_out->min_clk_table->dram_bw_table); in calculate_system_active_minimums()
77 &in_out->soc_bb->clk_table.dram_config, &in_out->min_clk_table->dram_bw_table); in calculate_system_active_minimums()
116 &in_out->soc_bb->clk_table.dram_config, &in_out->min_clk_table->dram_bw_table); in calculate_svp_prefetch_minimums()
120 &in_out->soc_bb->clk_table.dram_config, &in_out->min_clk_table->dram_bw_table); in calculate_svp_prefetch_minimums()
149 &in_out->soc_bb->clk_table.dram_config, &in_out->min_clk_table->dram_bw_table); in calculate_svp_prefetch_minimums()
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| /linux/drivers/gpu/drm/amd/display/dc/soc_and_ip_translator/dcn42/ |
| H A D | dcn42_soc_and_ip_translator.c | 143 dml_clk_table->dram_config.channel_count = dc_bw_params->num_channels; in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()
144 dml_clk_table->dram_config.channel_width_bytes = dc_bw_params->dram_channel_width_bytes; in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/ |
| H A D | dcn42_soc_bb.h | 121 .dram_config = {
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn4_calcs.c | 7101 …to_dram_bw_mbps(unsigned long uclk_khz, const struct dml2_dram_params *dram_config, const struct d… in uclk_khz_to_dram_bw_mbps() argument
7106 if (!dram_config->alt_clock_bw_conversion) in uclk_khz_to_dram_bw_mbps()
7107 …bw_mbps = ((double)uclk_khz * dram_config->channel_count * dram_config->channel_width_bytes * dram… in uclk_khz_to_dram_bw_mbps()
7120 …le dram_bw_kbps_to_uclk_mhz(unsigned long long bw_kbps, const struct dml2_dram_params *dram_config) in dram_bw_kbps_to_uclk_mhz() argument
7124 …uclk_mhz = (double)bw_kbps / (dram_config->channel_count * dram_config->channel_width_bytes * dram… in dram_bw_kbps_to_uclk_mhz()
7386 …s->ReorderingBytes = (unsigned int)(mode_lib->soc.clk_table.dram_config.channel_count * math_max3(… in dml_core_ms_prefetch_check()
8000 …tries[in_out_params->min_clk_index].pre_derate_dram_bw_kbps, &mode_lib->soc.clk_table.dram_config); in dml_core_mode_support()
9376 calculate_mcache_setting_params->num_chans = mode_lib->soc.clk_table.dram_config.channel_count; in dml_core_mode_support()
10445 …rogramming->min_clocks.dcn4x.active.uclk_khz, &mode_lib->soc.clk_table.dram_config, &min_clk_table… in dml_core_mode_programming()
10526 …ries[in_out_params->min_clk_index].pre_derate_dram_bw_kbps, &mode_lib->soc.clk_table.dram_config)); in dml_core_mode_programming()
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