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Searched refs:dppclk_mhz (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c126 .dppclk_mhz = 1200.0,
135 .dppclk_mhz = 1200.0,
144 .dppclk_mhz = 1200.0,
153 .dppclk_mhz = 1200.0,
162 .dppclk_mhz = 1200.0,
370 .dppclk_mhz = 556.0,
379 .dppclk_mhz = 625.0,
388 .dppclk_mhz = 625.0,
397 .dppclk_mhz = 1112.0,
406 .dppclk_mhz = 1250.0,
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn351/
H A Ddcn351_fpu.c106 .dppclk_mhz = 600.0,
119 .dppclk_mhz = 800.0,
132 .dppclk_mhz = 800.0,
145 .dppclk_mhz = 960.0,
158 .dppclk_mhz = 1066.7,
171 .dppclk_mhz = 1200.0,
184 .dppclk_mhz = 1371.4,
197 .dppclk_mhz = 1600.0,
284 if (clk_table->entries[i].dppclk_mhz > max_dppclk_mhz) in dcn351_update_bw_bounding_box_fpu()
285 max_dppclk_mhz = clk_table->entries[i].dppclk_mhz; in dcn351_update_bw_bounding_box_fpu()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn35/
H A Ddcn35_fpu.c123 .dppclk_mhz = 1200.0,
132 .dppclk_mhz = 1200.0,
141 .dppclk_mhz = 1200.0,
150 .dppclk_mhz = 1200.0,
159 .dppclk_mhz = 1200.0,
250 if (clk_table->entries[i].dppclk_mhz > max_dppclk_mhz) in dcn35_update_bw_bounding_box_fpu()
251 max_dppclk_mhz = clk_table->entries[i].dppclk_mhz; in dcn35_update_bw_bounding_box_fpu()
297 clock_limits[i].dppclk_mhz = max_dppclk_mhz ? in dcn35_update_bw_bounding_box_fpu()
299 dcn3_5_soc.clock_limits[closest_clk_lvl].dppclk_mhz; in dcn35_update_bw_bounding_box_fpu()
364 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dppclk_mhz = in dcn35_update_bw_bounding_box_fpu()
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/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_socbb.h35 uint32_t dppclk_mhz; member
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_structs.h168 double dppclk_mhz; member
550 double dppclk_mhz; member
H A Ddisplay_mode_vba.c68 if (need_recalculate && pipes[0].clks_cfg.dppclk_mhz != 0) in dml_get_voltage_level()
401 mode_lib->vba.MaxDppclk[i] = soc->clock_limits[i].dppclk_mhz; in fetch_socbb_params()
707 mode_lib->vba.DPPCLK[mode_lib->vba.NumberOfActivePlanes] = clks->dppclk_mhz; in fetch_pipe_params()
1109 if (mode_lib->vba.cache_pipes[pipe_idx].clks_cfg.dppclk_mhz > 0.0) in ModeSupportAndSystemConfiguration()
1110 mode_lib->vba.DPPCLK[k] = mode_lib->vba.cache_pipes[pipe_idx].clks_cfg.dppclk_mhz; in ModeSupportAndSystemConfiguration()
1112 mode_lib->vba.DPPCLK[k] = soc->clock_limits[mode_lib->vba.VoltageLevel].dppclk_mhz; in ModeSupportAndSystemConfiguration()
H A Ddisplay_mode_lib.c278 dml_print("DML PARAMS: dppclk_mhz = %3.2f\n", clks_cfg->dppclk_mhz); in dml_log_pipe_params()
H A Ddml1_display_rq_dlg_calc.c1018 double dppclk_freq_in_mhz = e2e_pipe_param->clks_cfg.dppclk_mhz; in dml1_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dclk_mgr.h123 unsigned int dppclk_mhz; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr.c156 &clk_mgr_base->bw_params->clk_table.entries[0].dppclk_mhz, in dcn3_init_clocks()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddisplay_mode_core_structs.h287 dml_float_t dppclk_mhz; member
671 dml_float_t dppclk_mhz[__DML_NUM_PLANES__]; member
H A Ddisplay_mode_core.c7220 1, mode_lib->ms.soc.dispclk_dppclk_vco_speed_mhz) <= mode_lib->ms.state.dppclk_mhz && in dml_core_mode_support()
7312 … > mode_lib->ms.state.dispclk_mhz) || (mode_lib->ms.GlobalDPPCLK > mode_lib->ms.state.dppclk_mhz)); in dml_core_mode_support()
8425 locals->Dppclk[k] = clk_cfg->dppclk_mhz[k]; in dml_core_mode_programming()
8427 locals->Dppclk[k] = mode_lib->ms.state.dppclk_mhz; in dml_core_mode_programming()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c65 clocks->dppclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dppclk_mhz * 1000; in dcn401_initialize_min_clocks()