Searched refs:dpp_base (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn30/ |
| H A D | dcn30_dpp.h | 588 struct dpp *dpp_base, const struct pwl_params *params);
591 struct dpp *dpp_base,
594 void dpp30_read_state(struct dpp *dpp_base,
597 void dpp30_read_reg_state(struct dpp *dpp_base, struct dcn_dpp_reg_state *dpp_reg_state);
605 struct dpp *dpp_base,
613 struct dpp *dpp_base,
617 struct dpp *dpp_base,
621 struct dpp *dpp_base,
624 void dpp3_set_pre_degam(struct dpp *dpp_base,
628 struct dpp *dpp_base,
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| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn35/ |
| H A D | dcn35_dpp.h | 53 struct dpp *dpp_base,
64 void dpp35_program_bias_and_scale_fcnv(struct dpp *dpp_base,
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| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn201/ |
| H A D | dcn201_dpp.c | 45 struct dpp *dpp_base, in dpp201_cnv_setup() argument
52 struct dcn201_dpp *dpp = TO_DCN201_DPP(dpp_base); in dpp201_cnv_setup()
177 dpp1_program_input_csc(dpp_base, color_space, select, NULL); in dpp201_cnv_setup()
185 dpp2_power_on_obuf(dpp_base, true); in dpp201_cnv_setup()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/ |
| H A D | dcn30_hwseq.c | 239 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn30_set_blend_lut() local
248 &dpp_base->regamma_params, in dcn30_set_blend_lut()
253 blend_lut = &dpp_base->regamma_params; in dcn30_set_blend_lut()
255 result = dpp_base->funcs->dpp_program_blnd_lut(dpp_base, blend_lut); in dcn30_set_blend_lut()
322 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn30_set_input_transfer_func() local
327 if (dpp_base == NULL || plane_state == NULL) in dcn30_set_input_transfer_func()
335 dpp_base->funcs->dpp_set_pre_degam(dpp_base, tf); in dcn30_set_input_transfer_func()
342 &dpp_base->degamma_params, false)) in dcn30_set_input_transfer_func()
343 params = &dpp_base->degamma_params; in dcn30_set_input_transfer_func()
345 result = dpp_base->funcs->dpp_program_gamcor_lut(dpp_base, params); in dcn30_set_input_transfer_func()
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