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Searched refs:dpm_clks (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_clk_mgr.c966 DpmClocks_t_dcn35 *table = smu_dpm_clks->dpm_clks; in dcn35_get_dpm_table_from_smu()
986 DpmClocks_t_dcn351 *table = smu_dpm_clks->dpm_clks; in dcn351_get_dpm_table_from_smu()
1376 smu_dpm_clks_a->dpm_clks == NULL || smu_dpm_clks_b->dpm_clks == NULL) in translate_to_DpmClocks_t_dcn35()
1380 smu_dpm_clks_b->dpm_clks->DcfClocks[i] = smu_dpm_clks_a->dpm_clks->DcfClocks[i]; in translate_to_DpmClocks_t_dcn35()
1383 smu_dpm_clks_b->dpm_clks->DispClocks[i] = smu_dpm_clks_a->dpm_clks->DispClocks[i]; in translate_to_DpmClocks_t_dcn35()
1386 smu_dpm_clks_b->dpm_clks->DppClocks[i] = smu_dpm_clks_a->dpm_clks->DppClocks[i]; in translate_to_DpmClocks_t_dcn35()
1389 smu_dpm_clks_b->dpm_clks->FclkClocks_Freq[i] = smu_dpm_clks_a->dpm_clks->FclkClocks_Freq[i]; in translate_to_DpmClocks_t_dcn35()
1390 smu_dpm_clks_b->dpm_clks->FclkClocks_Voltage[i] = smu_dpm_clks_a->dpm_clks->FclkClocks_Voltage[i]; in translate_to_DpmClocks_t_dcn35()
1393 smu_dpm_clks_b->dpm_clks->MemPstateTable[i].MemClk = in translate_to_DpmClocks_t_dcn35()
1394 smu_dpm_clks_a->dpm_clks->MemPstateTable[i].MemClk; in translate_to_DpmClocks_t_dcn35()
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H A Ddcn35_smu.h175 DpmClocks_t_dcn35 *dpm_clks; member
180 DpmClocks_t_dcn351 *dpm_clks; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_clk_mgr.c509 DpmClocks_t *table = smu_dpm_clks->dpm_clks; in dcn31_get_dpm_table_from_smu()
714 smu_dpm_clks.dpm_clks = (DpmClocks_t *)dm_helpers_allocate_gpu_mem( in dcn31_clk_mgr_construct()
720 if (smu_dpm_clks.dpm_clks == NULL) { in dcn31_clk_mgr_construct()
721 smu_dpm_clks.dpm_clks = &dummy_clocks; in dcn31_clk_mgr_construct()
725 ASSERT(smu_dpm_clks.dpm_clks); in dcn31_clk_mgr_construct()
765 smu_dpm_clks.dpm_clks->NumDcfClkLevelsEnabled, in dcn31_clk_mgr_construct()
766 smu_dpm_clks.dpm_clks->NumDispClkLevelsEnabled, in dcn31_clk_mgr_construct()
767 smu_dpm_clks.dpm_clks->NumSocClkLevelsEnabled, in dcn31_clk_mgr_construct()
768 smu_dpm_clks.dpm_clks->VcnClkLevelsEnabled, in dcn31_clk_mgr_construct()
769 smu_dpm_clks.dpm_clks->NumDfPstatesEnabled, in dcn31_clk_mgr_construct()
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H A Ddcn31_smu.h237 DpmClocks_t *dpm_clks; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_clk_mgr.c580 DpmClocks314_t *table = smu_dpm_clks->dpm_clks; in dcn314_get_dpm_table_from_smu()
831 smu_dpm_clks.dpm_clks = (DpmClocks314_t *)dm_helpers_allocate_gpu_mem( in dcn314_clk_mgr_construct()
837 if (smu_dpm_clks.dpm_clks == NULL) { in dcn314_clk_mgr_construct()
838 smu_dpm_clks.dpm_clks = &dummy_clocks; in dcn314_clk_mgr_construct()
842 ASSERT(smu_dpm_clks.dpm_clks); in dcn314_clk_mgr_construct()
881 smu_dpm_clks.dpm_clks->NumDcfClkLevelsEnabled, in dcn314_clk_mgr_construct()
882 smu_dpm_clks.dpm_clks->NumDispClkLevelsEnabled, in dcn314_clk_mgr_construct()
883 smu_dpm_clks.dpm_clks->NumSocClkLevelsEnabled, in dcn314_clk_mgr_construct()
884 smu_dpm_clks.dpm_clks->VcnClkLevelsEnabled, in dcn314_clk_mgr_construct()
885 smu_dpm_clks.dpm_clks->NumDfPstatesEnabled, in dcn314_clk_mgr_construct()
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H A Ddcn314_smu.h77 DpmClocks314_t *dpm_clks; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_smu.h95 DpmClocks_315_t *dpm_clks; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_smu.h103 DpmClocks_316_t *dpm_clks; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
H A Ddcn301_smu.h125 struct vg_dpm_clocks *dpm_clks; member