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Searched refs:dphy (Results 1 – 25 of 41) sorted by relevance

12

/linux/drivers/phy/cadence/
H A Dcdns-dphy.c88 int (*probe)(struct cdns_dphy *dphy);
89 void (*remove)(struct cdns_dphy *dphy);
90 void (*set_psm_div)(struct cdns_dphy *dphy, u8 div);
91 void (*set_clk_lane_cfg)(struct cdns_dphy *dphy,
93 void (*set_pll_cfg)(struct cdns_dphy *dphy,
95 unsigned long (*get_wakeup_time_ns)(struct cdns_dphy *dphy);
96 int (*wait_for_pll_lock)(struct cdns_dphy *dphy);
97 int (*wait_for_cmn_ready)(struct cdns_dphy *dphy);
117 static int cdns_dphy_get_pll_cfg(struct cdns_dphy *dphy, in cdns_dphy_get_pll_cfg() argument
121 unsigned long pll_ref_hz = clk_get_rate(dphy->pll_ref_clk); in cdns_dphy_get_pll_cfg()
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H A Dcdns-dphy-rx.c82 struct cdns_dphy_rx *dphy = phy_get_drvdata(phy); in cdns_dphy_rx_power_on() local
88 dphy->regs + DPHY_CMN_SSM); in cdns_dphy_rx_power_on()
95 struct cdns_dphy_rx *dphy = phy_get_drvdata(phy); in cdns_dphy_rx_power_off() local
97 writel(0, dphy->regs + DPHY_CMN_SSM); in cdns_dphy_rx_power_off()
129 static int cdns_dphy_rx_wait_lane_ready(struct cdns_dphy_rx *dphy, in cdns_dphy_rx_wait_lane_ready() argument
136 void __iomem *reg = dphy->regs; in cdns_dphy_rx_wait_lane_ready()
172 struct cdns_dphy_rx *dphy = phy_get_drvdata(phy); in cdns_dphy_rx_configure() local
183 writel(reg, dphy->regs + DPHY_LANE); in cdns_dphy_rx_configure()
196 writel(reg, dphy->regs + DPHY_BAND_CFG); in cdns_dphy_rx_configure()
203 writel(reg, dphy->regs + DPHY_POWER_ISLAND_EN_DATA); in cdns_dphy_rx_configure()
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H A DMakefile3 obj-$(CONFIG_PHY_CADENCE_DPHY) += cdns-dphy.o
4 obj-$(CONFIG_PHY_CADENCE_DPHY_RX) += cdns-dphy-rx.o
H A DKconfig23 cdns-dphy.
/linux/drivers/phy/allwinner/
H A Dphy-sun6i-mipi-dphy.c183 void (*tx_power_on)(struct sun6i_dphy *dphy);
202 struct sun6i_dphy *dphy = phy_get_drvdata(phy); in sun6i_dphy_init() local
204 reset_control_deassert(dphy->reset); in sun6i_dphy_init()
205 clk_prepare_enable(dphy->mod_clk); in sun6i_dphy_init()
206 clk_set_rate_exclusive(dphy->mod_clk, 150000000); in sun6i_dphy_init()
213 struct sun6i_dphy *dphy = phy_get_drvdata(phy); in sun6i_dphy_configure() local
220 memcpy(&dphy->config, opts, sizeof(dphy->config)); in sun6i_dphy_configure()
225 static void sun6i_a31_mipi_dphy_tx_power_on(struct sun6i_dphy *dphy) in sun6i_a31_mipi_dphy_tx_power_on() argument
227 u8 lanes_mask = GENMASK(dphy->config.lanes - 1, 0); in sun6i_a31_mipi_dphy_tx_power_on()
229 regmap_write(dphy->regs, SUN6I_DPHY_ANA0_REG, in sun6i_a31_mipi_dphy_tx_power_on()
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H A DMakefile3 obj-$(CONFIG_PHY_SUN6I_MIPI_DPHY) += phy-sun6i-mipi-dphy.o
/linux/drivers/phy/starfive/
H A Dphy-jh7110-dphy-rx.c75 struct stf_dphy *dphy = phy_get_drvdata(phy); in stf_dphy_configure() local
76 const struct stf_dphy_info *info = dphy->info; in stf_dphy_configure()
88 dphy->regs + STF_DPHY_APBCFGSAIF_SYSCFG(188)); in stf_dphy_configure()
93 dphy->regs + STF_DPHY_APBCFGSAIF_SYSCFG(192)); in stf_dphy_configure()
99 dphy->regs + STF_DPHY_APBCFGSAIF_SYSCFG(196)); in stf_dphy_configure()
102 dphy->regs + STF_DPHY_APBCFGSAIF_SYSCFG(200)); in stf_dphy_configure()
109 struct stf_dphy *dphy = phy_get_drvdata(phy); in stf_dphy_power_on() local
112 ret = pm_runtime_resume_and_get(dphy->dev); in stf_dphy_power_on()
116 ret = regulator_enable(dphy->mipi_0p9); in stf_dphy_power_on()
118 pm_runtime_put(dphy->dev); in stf_dphy_power_on()
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H A Dphy-jh7110-dphy-tx.c212 static void stf_dphy_hw_reset(struct stf_dphy *dphy, int assert) in stf_dphy_hw_reset() argument
218 dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(100)); in stf_dphy_hw_reset()
221 rc = readl_poll_timeout_atomic(dphy->topsys + in stf_dphy_hw_reset()
227 dev_err(dphy->dev, "MIPI dphy-tx # PLL Locked\n"); in stf_dphy_hw_reset()
233 struct stf_dphy *dphy = phy_get_drvdata(phy); in stf_dphy_configure() local
234 const struct stf_dphy_info *info = dphy->info; in stf_dphy_configure()
246 tmp = readl(dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(100)); in stf_dphy_configure()
249 writel(tmp, dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(100)); in stf_dphy_configure()
253 dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(8)); in stf_dphy_configure()
261 dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(12)); in stf_dphy_configure()
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H A DMakefile2 obj-$(CONFIG_PHY_STARFIVE_JH7110_DPHY_RX) += phy-jh7110-dphy-rx.o
3 obj-$(CONFIG_PHY_STARFIVE_JH7110_DPHY_TX) += phy-jh7110-dphy-tx.o
H A DKconfig16 phy-jh7110-dphy-rx.ko.
26 phy-jh7110-dphy-tx.ko.
/linux/drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/
H A Dsun8i_a83t_dphy.c13 static int sun8i_a83t_dphy_configure(struct phy *dphy, in sun8i_a83t_dphy_configure() argument
19 static int sun8i_a83t_dphy_power_on(struct phy *dphy) in sun8i_a83t_dphy_power_on() argument
21 struct sun8i_a83t_mipi_csi2_device *csi2_dev = phy_get_drvdata(dphy); in sun8i_a83t_dphy_power_on()
36 static int sun8i_a83t_dphy_power_off(struct phy *dphy) in sun8i_a83t_dphy_power_off() argument
38 struct sun8i_a83t_mipi_csi2_device *csi2_dev = phy_get_drvdata(dphy); in sun8i_a83t_dphy_power_off()
57 csi2_dev->dphy = devm_phy_create(dev, NULL, &sun8i_a83t_dphy_ops); in sun8i_a83t_dphy_register()
58 if (IS_ERR(csi2_dev->dphy)) { in sun8i_a83t_dphy_register()
60 return PTR_ERR(csi2_dev->dphy); in sun8i_a83t_dphy_register()
63 phy_set_drvdata(csi2_dev->dphy, csi2_dev); in sun8i_a83t_dphy_register()
H A Dsun8i_a83t_mipi_csi2.h50 struct phy *dphy; member
/linux/drivers/gpu/drm/kmb/
H A Dkmb_regs.h647 #define SET_DPHY_INIT_CTRL0(dev, dphy, offset) \ argument
649 ((dphy) + (offset)))
650 #define CLR_DPHY_INIT_CTRL0(dev, dphy, offset) \ argument
652 ((dphy) + (offset)))
659 #define SET_DPHY_FREQ_CTRL0_3(dev, dphy, val) \ argument
661 + (((dphy) / 4) * 4), (dphy % 4) * 8, 6, val)
667 #define GET_STOPSTATE_DATA(dev, dphy) \ argument
669 ((dphy) / 4) * 4)) >> \
670 (((dphy % 4) * 8) + 4)) & 0x03)
675 #define SET_DPHY_TEST_CTRL0(dev, dphy) \ argument
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/linux/drivers/media/platform/cadence/
H A Dcdns-csi2rx.c141 struct phy *dphy; member
296 ret = phy_power_on(csi2rx->dphy); in csi2rx_configure_ext_dphy()
300 ret = phy_configure(csi2rx->dphy, &opts); in csi2rx_configure_ext_dphy()
302 phy_power_off(csi2rx->dphy); in csi2rx_configure_ext_dphy()
348 if (csi2rx->dphy) { in csi2rx_start()
420 if (csi2rx->dphy) { in csi2rx_start()
422 phy_power_off(csi2rx->dphy); in csi2rx_start()
465 if (csi2rx->dphy) { in csi2rx_stop()
468 if (phy_power_off(csi2rx->dphy)) in csi2rx_stop()
704 csi2rx->dphy = devm_phy_optional_get(&pdev->dev, "dphy"); in csi2rx_get_resources()
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/linux/drivers/phy/amlogic/
H A DMakefile7 obj-$(CONFIG_PHY_MESON_G12A_MIPI_DPHY_ANALOG) += phy-meson-g12a-mipi-dphy-analog.o
10 obj-$(CONFIG_PHY_MESON_AXG_MIPI_DPHY) += phy-meson-axg-mipi-dphy.o
/linux/arch/arm64/boot/dts/sprd/
H A Dums9620.dtsi238 dphy_312m5: dphy-312m5 {
242 clock-output-names = "dphy-312m5";
245 dphy_416m7: dphy-416m7 {
249 clock-output-names = "dphy-416m7";
/linux/drivers/gpu/drm/bridge/cadence/
H A Dcdns-dsi-core.c539 ret = phy_validate(dsi->dphy, PHY_MODE_MIPI_DPHY, 0, &output->phy_opts); in cdns_dsi_check_conf()
628 phy_power_off(dsi->dphy); in cdns_dsi_bridge_atomic_post_disable()
629 phy_exit(dsi->dphy); in cdns_dsi_bridge_atomic_post_disable()
649 phy_init(dsi->dphy); in cdns_dsi_hs_init()
650 phy_set_mode(dsi->dphy, PHY_MODE_MIPI_DPHY); in cdns_dsi_hs_init()
651 phy_configure(dsi->dphy, &output->phy_opts); in cdns_dsi_hs_init()
652 phy_power_on(dsi->dphy); in cdns_dsi_hs_init()
933 ret = phy_validate(dsi->dphy, PHY_MODE_MIPI_DPHY, 0, &phy_opts); in cdns_dsi_round_pclk()
1294 dsi->dphy = devm_phy_get(&pdev->dev, "dphy"); in cdns_dsi_drm_probe()
1295 if (IS_ERR(dsi->dphy)) in cdns_dsi_drm_probe()
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/linux/drivers/gpu/drm/sun4i/
H A Dsun6i_mipi_dsi.c762 phy_init(dsi->dphy); in sun6i_dsi_encoder_enable()
768 phy_set_mode(dsi->dphy, PHY_MODE_MIPI_DPHY); in sun6i_dsi_encoder_enable()
769 phy_configure(dsi->dphy, &opts); in sun6i_dsi_encoder_enable()
770 phy_power_on(dsi->dphy); in sun6i_dsi_encoder_enable()
808 phy_power_off(dsi->dphy); in sun6i_dsi_encoder_disable()
809 phy_exit(dsi->dphy); in sun6i_dsi_encoder_disable()
1171 dsi->dphy = devm_phy_get(dev, "dphy"); in sun6i_dsi_probe()
1172 if (IS_ERR(dsi->dphy)) { in sun6i_dsi_probe()
1174 ret = PTR_ERR(dsi->dphy); in sun6i_dsi_probe()
H A Dsun6i_mipi_dsi.h33 struct phy *dphy; member
/linux/include/linux/platform_data/media/
H A Dmmp-camera.h21 int dphy[3]; /* DPHY: CSI2_DPHY3, CSI2_DPHY5, CSI2_DPHY6 */ member
/linux/drivers/media/platform/sunxi/sun6i-mipi-csi2/
H A Dsun6i_mipi_csi2.h47 struct phy *dphy; member
/linux/drivers/media/platform/raspberrypi/rp1-cfe/
H A Dcfe.c1138 2 * cfe->csi2.dphy.active_lanes); in cfe_get_source_link_freq()
1212 cfe->csi2.dphy.active_lanes = mbus_config.bus.mipi_csi2.num_data_lanes; in cfe_start_streaming()
1213 if (!cfe->csi2.dphy.active_lanes) in cfe_start_streaming()
1214 cfe->csi2.dphy.active_lanes = cfe->csi2.dphy.max_lanes; in cfe_start_streaming()
1215 if (cfe->csi2.dphy.active_lanes > cfe->csi2.dphy.max_lanes) { in cfe_start_streaming()
1217 cfe->csi2.dphy.active_lanes, cfe->csi2.dphy.max_lanes); in cfe_start_streaming()
1226 cfe->csi2.dphy.dphy_rate = div_s64(link_freq * 2, 1000000); in cfe_start_streaming()
2243 cfe->csi2.dphy.max_lanes = ep.bus.mipi_csi2.num_data_lanes; in cfe_register_async_nf()
2300 cfe->csi2.dphy.base = devm_platform_ioremap_resource(pdev, 1); in cfe_probe()
2301 if (IS_ERR(cfe->csi2.dphy.base)) { in cfe_probe()
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/linux/drivers/phy/freescale/
H A DMakefile4 obj-$(CONFIG_PHY_MIXEL_MIPI_DPHY) += phy-fsl-imx8-mipi-dphy.o
/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-a33.dtsi265 phys = <&dphy>;
266 phy-names = "dphy";
278 dphy: d-phy@1ca1000 { label
279 compatible = "allwinner,sun6i-a31-mipi-dphy";
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mq-tqma8mq-mba8mx-lvds-tm070jvhg33.dtso21 &dphy {

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