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Searched refs:dml_to_dc_pipe_mapping (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddml2_wrapper_fpu.c88 …dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id[num_pipes] = dml2->v20.scratch.… in map_hw_resources()
89 dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id_valid[num_pipes] = true; in map_hw_resources()
90 …dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id[num_pipes] = dml2->v20.scratch.d… in map_hw_resources()
91 dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id_valid[num_pipes] = true; in map_hw_resources()
174 memset(&s_global->dml_to_dc_pipe_mapping, 0, sizeof(struct dml2_dml_to_dc_pipe_mapping)); in calculate_lowest_supported_state_for_temp_read()
281 memset(&s->dml_to_dc_pipe_mapping, 0, sizeof(struct dml2_dml_to_dc_pipe_mapping)); in dml_mode_support_wrapper()
444 …dml2_map_dc_pipes(dml2, context, &s->cur_display_config, &s->dml_to_dc_pipe_mapping, in_dc->curren… in dml2_validate_and_build_resource()
457 …dml2_map_dc_pipes(dml2, context, &s->cur_display_config, &s->dml_to_dc_pipe_mapping, in_dc->curren… in dml2_validate_and_build_resource()
H A Ddml2_translation_helper.c1145 …if (dml2->v20.scratch.dml_to_dc_pipe_mapping.disp_cfg_to_stream_id_valid[i] && dml2->v20.scratch.d… in map_stream_to_dml_display_cfg()
1192 …if (dml2->v20.scratch.dml_to_dc_pipe_mapping.disp_cfg_to_plane_id_valid[i] && dml2->v20.scratch.dm… in map_plane_to_dml_display_cfg()
1206 …struct dml2_dml_to_dc_pipe_mapping *dml_to_dc_pipe_mapping = &dml2->v20.scratch.dml_to_dc_pipe_map… in dml2_populate_pipe_to_plane_index_mapping() local
1209 dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index_valid[i] = false; in dml2_populate_pipe_to_plane_index_mapping()
1210 dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index[i] = 0; in dml2_populate_pipe_to_plane_index_mapping()
1222 …if (pipe->stream && dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index_valid[pipe_index] == false… in dml2_populate_pipe_to_plane_index_mapping()
1223 dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index[pipe_index] = plane_index; in dml2_populate_pipe_to_plane_index_mapping()
1225 dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index_valid[pipe_index] = true; in dml2_populate_pipe_to_plane_index_mapping()
1307 dml2->v20.scratch.dml_to_dc_pipe_mapping.disp_cfg_to_stream_id_valid[i] = false; in map_dc_state_into_dml_display_cfg()
1308 dml2->v20.scratch.dml_to_dc_pipe_mapping.disp_cfg_to_plane_id_valid[i] = false; in map_dc_state_into_dml_display_cfg()
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H A Ddml2_utils.c198 …if (ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id_valid[i] && ctx->v20.scratch… in dml2_helper_find_dml_pipe_idx_by_stream_id()
209 …if (ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id_valid[i] && ctx->v20.scratch.… in find_dml_pipe_idx_by_plane_id()
308 …in_ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[context->res_ctx.pipe_ctx[d… in dml2_calculate_rq_and_dlg_params()
316 ASSERT(in_ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id_valid[dml_pipe_idx]); in dml2_calculate_rq_and_dlg_params()
317 …ASSERT(in_ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id[dml_pipe_idx] == conte… in dml2_calculate_rq_and_dlg_params()
526 …in_ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[display_state->res_ctx.pipe… in dml2_verify_det_buffer_configuration()
H A Ddml2_dc_resource_mgmt.c132 …ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[state->res_ctx.pipe_ctx[i].pip… in find_master_pipe_of_plane()
155 ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[pipe->pipe_idx], in find_pipes_assigned_to_plane()
724 …ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[state->res_ctx.pipe_ctx[i].pip… in free_unused_pipes_for_plane()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/
H A Ddml21_utils.c18 …if (ctx->v21.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id_valid[i] && ctx->v21.dml_to_dc_pipe_… in dml21_helper_find_dml_pipe_idx_by_stream_id()
29 …if (ctx->v21.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id_valid[i] && ctx->v21.dml_to_dc_pipe_m… in dml21_find_dml_pipe_idx_by_plane_id()
107 main_stream_id = dml_ctx->v21.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id[dml_stream_index]; in dml21_find_dc_pipes_for_plane()
115 …dc_plane_index = dml21_get_dc_plane_idx_from_plane_id(dml_ctx->v21.dml_to_dc_pipe_mapping.dml_pipe… in dml21_find_dc_pipes_for_plane()
337 dml_ctx->v21.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id[dml_stream_index]); in dml21_handle_phantom_streams_planes()
358 …dc_plane_index = dml21_get_dc_plane_idx_from_plane_id(dml_ctx->v21.dml_to_dc_pipe_mapping.dml_pipe… in dml21_handle_phantom_streams_planes()
376 …dml2_map_dc_pipes(dml_ctx, context, NULL, &dml_ctx->v21.dml_to_dc_pipe_mapping, dc->current_state); in dml21_handle_phantom_streams_planes()
H A Ddml21_translation_helper.c692 …if (dml_ctx->v21.dml_to_dc_pipe_mapping.disp_cfg_to_stream_id_valid[i] && dml_ctx->v21.dml_to_dc_p… in map_stream_to_dml21_display_cfg()
714 …if (dml_ctx->v21.dml_to_dc_pipe_mapping.disp_cfg_to_plane_id_valid[i] && dml_ctx->v21.dml_to_dc_pi… in map_plane_to_dml21_display_cfg()
755 memset(&dml_ctx->v21.dml_to_dc_pipe_mapping, 0, sizeof(struct dml2_dml_to_dc_pipe_mapping)); in dml21_map_dc_state_into_dml_display_cfg()
787 …dml_ctx->v21.dml_to_dc_pipe_mapping.disp_cfg_to_stream_id[disp_cfg_stream_location] = context->str… in dml21_map_dc_state_into_dml_display_cfg()
788 dml_ctx->v21.dml_to_dc_pipe_mapping.disp_cfg_to_stream_id_valid[disp_cfg_stream_location] = true; in dml21_map_dc_state_into_dml_display_cfg()
813 …am_status[stream_index].plane_states[plane_index], &dml_ctx->v21.dml_to_dc_pipe_mapping.disp_cfg_t… in dml21_map_dc_state_into_dml_display_cfg()
814 dml_ctx->v21.dml_to_dc_pipe_mapping.disp_cfg_to_plane_id_valid[disp_cfg_plane_location] = true; in dml21_map_dc_state_into_dml_display_cfg()
907 …dml_ctx->v21.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id[i] = dml_ctx->v21.dml_to_dc_pipe_map… in dml21_map_hw_resources()
908 dml_ctx->v21.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id_valid[i] = true; in dml21_map_hw_resources()
909 …dml_ctx->v21.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id[i] = dml_ctx->v21.dml_to_dc_pipe_mapp… in dml21_map_hw_resources()
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H A Ddml21_wrapper_fpu.c177 memset(&dml_ctx->v21.dml_to_dc_pipe_mapping, 0, sizeof(struct dml2_dml_to_dc_pipe_mapping)); in dml21_check_mode_support()
206 memset(&dml_ctx->v21.dml_to_dc_pipe_mapping, 0, sizeof(struct dml2_dml_to_dc_pipe_mapping)); in dml21_mode_check_and_programming()
235 …dml2_map_dc_pipes(dml_ctx, context, NULL, &dml_ctx->v21.dml_to_dc_pipe_mapping, in_dc->current_sta… in dml21_mode_check_and_programming()