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Searched refs:dml_clk_table (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/soc_and_ip_translator/dcn42/
H A Ddcn42_soc_and_ip_translator.c33 struct dml2_soc_state_table *dml_clk_table, in dcn42_convert_dc_clock_table_to_soc_bb_clock_table() argument
50 dml_clk_table->fclk.num_clk_values = dc_clk_table->num_entries_per_clk.num_dcfclk_levels; in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()
51 dml_clk_table->dcfclk.num_clk_values = dc_clk_table->num_entries_per_clk.num_dcfclk_levels; in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()
56 dml_clk_table->dcfclk.clk_values_khz[i] = dc_clk_table->entries[i].dcfclk_mhz * 1000; in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()
60 dml_clk_table->fclk.clk_values_khz[i] = max_fclk; in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()
61 if (max_fclk >= 2 * dml_clk_table->dcfclk.clk_values_khz[i]) in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()
65 dml_clk_table->dcfclk.clk_values_khz[i] = 0; in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()
66 dml_clk_table->fclk.clk_values_khz[i] = 0; in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()
73 dml_clk_table->uclk.num_clk_values = dc_clk_table->num_entries_per_clk.num_memclk_levels; in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()
75 if (i < dml_clk_table->uclk.num_clk_values) { in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()
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