/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
H A D | display_mode_vba_31.c | 1025 Tvm_trips_rounded = dml_ceil(4.0 * Tvm_trips / LineTime, 1) / 4 * LineTime; 1026 Tr0_trips_rounded = dml_ceil(4.0 * Tr0_trips / LineTime, 1) / 4 * LineTime; 1064 Lsw_oto = dml_ceil(4 * dml_max(prefetch_sw_bytes / prefetch_bw_oto / LineTime, min_Lsw), 1) / 4; 1104 Tvm_oto_lines = dml_ceil(4.0 * Tvm_oto / LineTime, 1) / 4.0; 1105 Tr0_oto_lines = dml_ceil(4.0 * Tr0_oto / LineTime, 1) / 4.0; 1280 …*DestinationLinesToRequestVMInVBlank = dml_ceil(4.0 * TimeForFetchingMetaPTE / LineTime, 1.0) / 4.… 1282 …*DestinationLinesToRequestRowInVBlank = dml_ceil(4.0 * TimeForFetchingRowInVBlank / LineTime, 1.0)… 1466 return VCOSpeed * 4 / dml_ceil(VCOSpeed * 4.0 / Clock, 1); 1587 full_swath_bytes_horz_wc_l = dml_ceil(full_swath_bytes_horz_wc_l * 2 / 3, 256); 1588 full_swath_bytes_horz_wc_c = dml_ceil(full_swath_bytes_horz_wc_c * 2 / 3, 256); [all …]
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/linux/drivers/gpu/drm/amd/display/dc/dml/ |
H A D | display_mode_vba.c | 1131 dml_ceil(WritebackLumaHTaps / 4.0, 1) / WritebackHRatio, in CalculateWriteBackDISPCLK() 1132 …dml_max((WritebackLumaVTaps * dml_ceil(1.0 / WritebackVRatio, 1) * dml_ceil(WritebackDestinationWi… in CalculateWriteBackDISPCLK() 1133 …+ dml_ceil(WritebackDestinationWidth / 4.0, 1)) / (double) HTotal + dml_ceil(1.0 / WritebackVRatio… in CalculateWriteBackDISPCLK() 1134 * (dml_ceil(WritebackLumaVTaps / 4.0, 1) + 4.0) / (double) HTotal, in CalculateWriteBackDISPCLK() 1135 dml_ceil(1.0 / WritebackVRatio, 1) * WritebackDestinationWidth / (double) HTotal)); in CalculateWriteBackDISPCLK() 1138 dml_ceil(WritebackChromaHTaps / 2.0, 1) / (2 * WritebackHRatio), in CalculateWriteBackDISPCLK() 1139 …dml_max((WritebackChromaVTaps * dml_ceil(1 / (2 * WritebackVRatio), 1) * dml_ceil(WritebackDestina… in CalculateWriteBackDISPCLK() 1140 + dml_ceil(WritebackDestinationWidth / 2.0 / WritebackChromaLineBufferWidth, 1)) / HTotal in CalculateWriteBackDISPCLK() 1141 … + dml_ceil(1 / (2 * WritebackVRatio), 1) * (dml_ceil(WritebackChromaVTaps / 4.0, 1) + 4) / HTotal, in CalculateWriteBackDISPCLK() 1142 dml_ceil(1.0 / (2 * WritebackVRatio), 1) * WritebackDestinationWidth / 2.0 / HTotal))); in CalculateWriteBackDISPCLK()
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H A D | dml_inline_defs.h | 67 static inline double dml_ceil(double a, double granularity) in dml_ceil() function
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H A D | dml1_display_rq_dlg_calc.c | 185 …*max_num_sw = (unsigned int) (dml_ceil((prefill - 1.0) / (double) swath_height, 1) + 1.0); /* pref… in get_swath_need() 447 + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); in dml1_rq_dlg_get_row_heights() 686 + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); in get_surf_rq_param() 922 rq_dlg_param->dpte_groups_per_row_ub = dml_ceil( in get_surf_rq_param() 1845 cur0_width_ub = dml_ceil((double) cur0_src_width / (double) cur0_req_width, 1) in dml1_rq_dlg_get_dlg_params()
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/linux/drivers/gpu/drm/amd/display/dc/dml2/ |
H A D | display_mode_util.h | 38 __DML_DLL_EXPORT__ dml_float_t dml_ceil(dml_float_t x, dml_float_t granularity);
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H A D | display_mode_util.c | 108 dml_float_t dml_ceil(dml_float_t x, dml_float_t granularity) in dml_ceil() function 186 double ceil = dml_ceil(val, 1); in dml_round()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
H A D | display_rq_dlg_calc_32.c | 294 …dst_x_after_scaler = dml_ceil(get_dst_x_after_scaler(mode_lib, e2e_pipe_param, num_pipes, pipe_idx… in dml32_rq_dlg_get_dlg_reg() 295 …dst_y_after_scaler = dml_ceil(get_dst_y_after_scaler(mode_lib, e2e_pipe_param, num_pipes, pipe_idx… in dml32_rq_dlg_get_dlg_reg()
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H A D | display_mode_vba_32.c | 700 dml_ceil((double) v->WritebackDelay[mode_lib->vba.VoltageLevel][k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1446 dml_ceil(v->WritebackDelay[mode_lib->vba.VoltageLevel][k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1833 v->ReadBandwidthLuma[k] = v->SwathWidthYSingleDPP[k] * dml_ceil(v->BytePerPixelInDETY[k], 1.0) in dml32_ModeSupportAndSystemConfigurationFull() 1835 …v->ReadBandwidthChroma[k] = v->SwathWidthYSingleDPP[k] / 2 * dml_ceil(v->BytePerPixelInDETC[k], 2.… in dml32_ModeSupportAndSystemConfigurationFull() 1940 / (mode_lib->vba.vtaps[k] + dml_max(dml_ceil(mode_lib->vba.VRatio[k], 1.0) - 2, 0.0)); in dml32_ModeSupportAndSystemConfigurationFull() 1947 + dml_max(dml_ceil(mode_lib->vba.VRatioChroma[k], 1.0) - 2, in dml32_ModeSupportAndSystemConfigurationFull() 2967 - dml_max(1.0, dml_ceil(1.0 * in dml32_ModeSupportAndSystemConfigurationFull() 3631 mode_lib->vba.AlignedYPitch[k] = dml_ceil( in dml32_ModeSupportAndSystemConfigurationFull() 3635 mode_lib->vba.AlignedDCCMetaPitchY[k] = dml_ceil( in dml32_ModeSupportAndSystemConfigurationFull() 3646 mode_lib->vba.AlignedCPitch[k] = dml_ceil( in dml32_ModeSupportAndSystemConfigurationFull() [all …]
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
H A D | display_rq_dlg_calc_21.c | 446 + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); in get_meta_and_pte_attr() 680 rq_dlg_param->dpte_groups_per_row_ub = dml_ceil( in get_meta_and_pte_attr() 1733 cur_width_ub = dml_ceil((double) cur_src_width / (double) cur_req_width, 1) in calculate_ttu_cursor()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
H A D | display_rq_dlg_calc_20.c | 454 + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); in get_meta_and_pte_attr() 673 rq_dlg_param->dpte_groups_per_row_ub = dml_ceil((double) dpte_row_width_ub / dpte_group_width, in get_meta_and_pte_attr() 1619 cur_width_ub = dml_ceil((double) cur_src_width / (double) cur_req_width, 1) in calculate_ttu_cursor()
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H A D | display_rq_dlg_calc_20v2.c | 454 + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); in get_meta_and_pte_attr() 673 rq_dlg_param->dpte_groups_per_row_ub = dml_ceil((double) dpte_row_width_ub / dpte_group_width, in get_meta_and_pte_attr() 1620 cur_width_ub = dml_ceil((double) cur_src_width / (double) cur_req_width, 1) in calculate_ttu_cursor()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
H A D | dcn314_fpu.c | 291 num_lines = dml_ceil(1000.0 * num_us / lines_time_in_ns, 1.0); in micro_sec_to_vert_lines()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn35/ |
H A D | dcn35_fpu.c | 419 num_lines = dml_ceil(1000.0 * num_us / lines_time_in_ns, 1.0); in micro_sec_to_vert_lines()
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