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Searched refs:dmacr (Results 1 – 5 of 5) sorted by relevance

/linux/include/linux/fsl/
H A Dguts.h106 u32 dmacr; /* 0x.0908 - DMA Control Register */ member
160 clrsetbits_be32(&guts->dmacr, 3 << shift, device << shift); in guts_set_dmacr()
/linux/drivers/dma/xilinx/
H A Dxilinx_dma.c2677 u32 dmacr; in xilinx_vdma_channel_set_config() local
2682 dmacr = dma_ctrl_read(chan, XILINX_DMA_REG_DMACR); in xilinx_vdma_channel_set_config()
2691 dmacr &= ~XILINX_DMA_DMACR_GENLOCK_EN; in xilinx_vdma_channel_set_config()
2693 dmacr |= XILINX_DMA_DMACR_GENLOCK_EN; in xilinx_vdma_channel_set_config()
2694 dmacr &= ~XILINX_DMA_DMACR_MASTER_MASK; in xilinx_vdma_channel_set_config()
2695 dmacr |= cfg->master << XILINX_DMA_DMACR_MASTER_SHIFT; in xilinx_vdma_channel_set_config()
2710 dmacr &= ~XILINX_DMA_DMACR_FRAME_COUNT_MASK; in xilinx_vdma_channel_set_config()
2711 dmacr |= cfg->coalesc << XILINX_DMA_DMACR_FRAME_COUNT_SHIFT; in xilinx_vdma_channel_set_config()
2716 dmacr &= ~XILINX_DMA_DMACR_DELAY_MASK; in xilinx_vdma_channel_set_config()
2717 dmacr |= cfg->delay << XILINX_DMA_DMACR_DELAY_SHIFT; in xilinx_vdma_channel_set_config()
[all …]
/linux/drivers/spi/
H A Dspi-rockchip.c538 u32 dmacr = 0; in rockchip_spi_config() local
583 dmacr |= TF_DMA_EN; in rockchip_spi_config()
585 dmacr |= RF_DMA_EN; in rockchip_spi_config()
603 writel_relaxed(dmacr, rs->regs + ROCKCHIP_SPI_DMACR); in rockchip_spi_config()
/linux/drivers/dma/
H A Dmpc512x_dma.c95 u32 dmacr; /* DMA control register */ member
1023 out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_ERCA); in mpc_dma_probe()
1034 out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_EDCG | in mpc_dma_probe()
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_adminq_cmd.h277 __le32 dmacr; member