Home
last modified time | relevance | path

Searched refs:dma_cfg (Results 1 – 25 of 31) sorted by relevance

12

/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac1000_dma.c75 struct stmmac_dma_cfg *dma_cfg, u32 chan) in dwmac1000_dma_init_channel() argument
77 int txpbl = dma_cfg->txpbl ?: dma_cfg->pbl; in dwmac1000_dma_init_channel()
78 int rxpbl = dma_cfg->rxpbl ?: dma_cfg->pbl; in dwmac1000_dma_init_channel()
88 if (dma_cfg->pblx8) in dwmac1000_dma_init_channel()
96 if (dma_cfg->fixed_burst) in dwmac1000_dma_init_channel()
100 if (dma_cfg->mixed_burst) in dwmac1000_dma_init_channel()
103 if (dma_cfg->atds) in dwmac1000_dma_init_channel()
106 if (dma_cfg->aal) in dwmac1000_dma_init_channel()
117 struct stmmac_dma_cfg *dma_cfg, in dwmac1000_dma_init_rx() argument
126 struct stmmac_dma_cfg *dma_cfg, in dwmac1000_dma_init_tx() argument
H A Ddwmac4_dma.c74 struct stmmac_dma_cfg *dma_cfg, in dwmac4_dma_init_rx_chan() argument
79 u32 rxpbl = dma_cfg->rxpbl ?: dma_cfg->pbl; in dwmac4_dma_init_rx_chan()
85 if (IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) && likely(dma_cfg->eame)) in dwmac4_dma_init_rx_chan()
95 struct stmmac_dma_cfg *dma_cfg, in dwmac4_dma_init_tx_chan() argument
100 u32 txpbl = dma_cfg->txpbl ?: dma_cfg->pbl; in dwmac4_dma_init_tx_chan()
110 if (IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) && likely(dma_cfg->eame)) in dwmac4_dma_init_tx_chan()
120 struct stmmac_dma_cfg *dma_cfg, u32 chan) in dwmac4_dma_init_channel() argument
127 if (dma_cfg->pblx8) in dwmac4_dma_init_channel()
138 struct stmmac_dma_cfg *dma_cfg, u32 chan) in dwmac410_dma_init_channel() argument
145 if (dma_cfg->pblx8) in dwmac410_dma_init_channel()
[all …]
H A Ddwmac-loongson.c115 plat->dma_cfg->pbl = 32; in loongson_default_data()
116 plat->dma_cfg->pblx8 = true; in loongson_default_data()
208 struct stmmac_dma_cfg *dma_cfg, in loongson_dwmac_dma_init_channel() argument
211 int txpbl = dma_cfg->txpbl ?: dma_cfg->pbl; in loongson_dwmac_dma_init_channel()
212 int rxpbl = dma_cfg->rxpbl ?: dma_cfg->pbl; in loongson_dwmac_dma_init_channel()
217 if (dma_cfg->pblx8) in loongson_dwmac_dma_init_channel()
226 if (dma_cfg->fixed_burst) in loongson_dwmac_dma_init_channel()
230 if (dma_cfg->mixed_burst) in loongson_dwmac_dma_init_channel()
233 if (dma_cfg->atds) in loongson_dwmac_dma_init_channel()
236 if (dma_cfg->aal) in loongson_dwmac_dma_init_channel()
[all …]
H A Dstmmac_platform.c421 struct stmmac_dma_cfg *dma_cfg; in stmmac_probe_config_dt() local
567 dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*dma_cfg), in stmmac_probe_config_dt()
569 if (!dma_cfg) { in stmmac_probe_config_dt()
573 plat->dma_cfg = dma_cfg; in stmmac_probe_config_dt()
575 of_property_read_u32(np, "snps,pbl", &dma_cfg->pbl); in stmmac_probe_config_dt()
576 if (!dma_cfg->pbl) in stmmac_probe_config_dt()
577 dma_cfg->pbl = DEFAULT_DMA_PBL; in stmmac_probe_config_dt()
578 of_property_read_u32(np, "snps,txpbl", &dma_cfg->txpbl); in stmmac_probe_config_dt()
579 of_property_read_u32(np, "snps,rxpbl", &dma_cfg->rxpbl); in stmmac_probe_config_dt()
580 dma_cfg->pblx8 = !of_property_read_bool(np, "snps,no-pbl-x8"); in stmmac_probe_config_dt()
[all …]
H A Dstmmac_pci.c61 plat->dma_cfg->pbl = 32; in stmmac_default_data()
62 plat->dma_cfg->pblx8 = true; in stmmac_default_data()
117 plat->dma_cfg->pbl = 32; in snps_gmac5_default_data()
118 plat->dma_cfg->pblx8 = true; in snps_gmac5_default_data()
172 plat->dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*plat->dma_cfg), in stmmac_pci_probe()
174 if (!plat->dma_cfg) in stmmac_pci_probe()
H A Ddwmac100_dma.c22 struct stmmac_dma_cfg *dma_cfg) in dwmac100_dma_init() argument
25 writel(DMA_BUS_MODE_DEFAULT | (dma_cfg->pbl << DMA_BUS_MODE_PBL_SHIFT), in dwmac100_dma_init()
33 struct stmmac_dma_cfg *dma_cfg, in dwmac100_dma_init_rx() argument
41 struct stmmac_dma_cfg *dma_cfg, in dwmac100_dma_init_tx() argument
H A Ddwxgmac2_dma.c23 struct stmmac_dma_cfg *dma_cfg) in dwxgmac2_dma_init() argument
27 if (dma_cfg->aal) in dwxgmac2_dma_init()
30 if (dma_cfg->eame) in dwxgmac2_dma_init()
38 struct stmmac_dma_cfg *dma_cfg, u32 chan) in dwxgmac2_dma_init_chan() argument
42 if (dma_cfg->pblx8) in dwxgmac2_dma_init_chan()
51 struct stmmac_dma_cfg *dma_cfg, in dwxgmac2_dma_init_rx_chan() argument
54 u32 rxpbl = dma_cfg->rxpbl ?: dma_cfg->pbl; in dwxgmac2_dma_init_rx_chan()
68 struct stmmac_dma_cfg *dma_cfg, in dwxgmac2_dma_init_tx_chan() argument
71 u32 txpbl = dma_cfg->txpbl ?: dma_cfg->pbl; in dwxgmac2_dma_init_tx_chan()
H A Dhwif.h181 void (*init)(void __iomem *ioaddr, struct stmmac_dma_cfg *dma_cfg);
183 struct stmmac_dma_cfg *dma_cfg, u32 chan);
185 struct stmmac_dma_cfg *dma_cfg,
188 struct stmmac_dma_cfg *dma_cfg,
/linux/drivers/usb/musb/
H A Dtusb6010_omap.c197 struct dma_slave_config dma_cfg; in tusb_omap_dma_program() local
270 memset(&dma_cfg, 0, sizeof(dma_cfg)); in tusb_omap_dma_program()
274 dma_cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; in tusb_omap_dma_program()
275 dma_cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; in tusb_omap_dma_program()
278 dma_cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; in tusb_omap_dma_program()
279 dma_cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; in tusb_omap_dma_program()
290 dma_cfg.src_addr = fifo_addr; in tusb_omap_dma_program()
291 dma_cfg.dst_addr = fifo_addr; in tusb_omap_dma_program()
292 dma_cfg.src_port_window_size = port_window; in tusb_omap_dma_program()
293 dma_cfg.src_maxburst = port_window; in tusb_omap_dma_program()
[all …]
/linux/drivers/dma/
H A Dep93xx_dma.c197 struct ep93xx_dma_chan_cfg dma_cfg; member
383 writel(edmac->dma_cfg.port & 0xf, edmac->regs + M2P_PPALLOC); in m2p_hw_setup()
522 if (edmac->dma_cfg.dir == DMA_MEM_TO_MEM) { in m2m_hw_setup()
528 switch (edmac->dma_cfg.port) { in m2m_hw_setup()
538 if (edmac->dma_cfg.dir == DMA_MEM_TO_DEV) { in m2m_hw_setup()
554 if (edmac->dma_cfg.dir == DMA_MEM_TO_DEV) { in m2m_hw_setup()
634 if (edmac->dma_cfg.dir == DMA_MEM_TO_MEM) { in m2m_hw_submit()
696 if (done && edmac->dma_cfg.dir == DMA_MEM_TO_MEM) { in m2m_hw_interrupt()
932 if (edmac->dma_cfg.port > EP93XX_DMA_IRDA) in ep93xx_dma_alloc_chan_resources()
934 if (edmac->dma_cfg.dir != ep93xx_dma_chan_direction(chan)) in ep93xx_dma_alloc_chan_resources()
[all …]
H A Dste_dma40.c499 struct stedma40_chan_cfg dma_cfg; member
881 chan->dma_cfg.dir == DMA_DEV_TO_MEM)) in d40_log_lli_to_lcxa()
1264 u32 event = D40_TYPE_TO_EVENT(d40c->dma_cfg.dev_type); in d40_config_set_event()
1267 if ((d40c->dma_cfg.dir == DMA_DEV_TO_MEM) || in d40_config_set_event()
1268 (d40c->dma_cfg.dir == DMA_DEV_TO_DEV)) in d40_config_set_event()
1272 if (d40c->dma_cfg.dir != DMA_DEV_TO_MEM) in d40_config_set_event()
1366 return phy_map[d40c->dma_cfg.mode_opt]; in d40_get_prmo()
1368 return log_map[d40c->dma_cfg.mode_opt]; in d40_get_prmo()
1420 return num_elt * d40c->dma_cfg.dst_info.data_width; in d40_residue()
1856 int dev_type = d40c->dma_cfg.dev_type; in d40_allocate_channel()
[all …]
/linux/drivers/ata/
H A Dpata_octeon_cf.c595 union cvmx_mio_boot_dma_cfgx dma_cfg; in octeon_cf_dma_finished() local
604 dma_cfg.u64 = cvmx_read_csr(cf_port->dma_base + DMA_CFG); in octeon_cf_dma_finished()
605 if (dma_cfg.s.size != 0xfffff) { in octeon_cf_dma_finished()
612 dma_cfg.u64 = 0; in octeon_cf_dma_finished()
613 dma_cfg.s.size = -1; in octeon_cf_dma_finished()
614 cvmx_write_csr(cf_port->dma_base + DMA_CFG, dma_cfg.u64); in octeon_cf_dma_finished()
653 union cvmx_mio_boot_dma_cfgx dma_cfg; in octeon_cf_interrupt() local
659 dma_cfg.u64 = cvmx_read_csr(cf_port->dma_base + DMA_CFG); in octeon_cf_interrupt()
666 if (dma_int.s.done && !dma_cfg.s.en) { in octeon_cf_interrupt()
975 union cvmx_mio_boot_dma_cfgx dma_cfg; in octeon_cf_shutdown() local
[all …]
/linux/drivers/mmc/host/
H A Dcavium-thunderx.c174 u64 dma_cfg; in thunder_mmc_remove() local
181 dma_cfg = readq(host->dma_base + MIO_EMM_DMA_CFG(host)); in thunder_mmc_remove()
182 dma_cfg &= ~MIO_EMM_DMA_CFG_EN; in thunder_mmc_remove()
183 writeq(dma_cfg, host->dma_base + MIO_EMM_DMA_CFG(host)); in thunder_mmc_remove()
H A Dcavium.c518 u64 dma_cfg, addr; in prepare_dma_single() local
527 dma_cfg = FIELD_PREP(MIO_EMM_DMA_CFG_EN, 1) | in prepare_dma_single()
530 dma_cfg |= FIELD_PREP(MIO_EMM_DMA_CFG_ENDIAN, 1); in prepare_dma_single()
532 dma_cfg |= FIELD_PREP(MIO_EMM_DMA_CFG_SIZE, in prepare_dma_single()
537 dma_cfg |= FIELD_PREP(MIO_EMM_DMA_CFG_ADR, addr); in prepare_dma_single()
538 writeq(dma_cfg, host->dma_base + MIO_EMM_DMA_CFG(host)); in prepare_dma_single()
/linux/drivers/comedi/drivers/
H A Dni_660x.c264 unsigned int dma_cfg[NI660X_MAX_CHIPS]; member
316 devpriv->dma_cfg[chip] &= ~NI660X_DMA_CFG_SEL_MASK(mite_channel); in ni_660x_set_dma_channel()
317 devpriv->dma_cfg[chip] |= NI660X_DMA_CFG_SEL(mite_channel, in ni_660x_set_dma_channel()
319 ni_660x_write(dev, chip, devpriv->dma_cfg[chip] | in ni_660x_set_dma_channel()
331 devpriv->dma_cfg[chip] &= ~NI660X_DMA_CFG_SEL_MASK(mite_channel); in ni_660x_unset_dma_channel()
332 devpriv->dma_cfg[chip] |= NI660X_DMA_CFG_SEL_NONE(mite_channel); in ni_660x_unset_dma_channel()
333 ni_660x_write(dev, chip, devpriv->dma_cfg[chip], NI660X_DMA_CFG); in ni_660x_unset_dma_channel()
984 devpriv->dma_cfg[chip] = 0; in ni_660x_init_tio_chips()
986 devpriv->dma_cfg[chip] |= NI660X_DMA_CFG_SEL_NONE(chan); in ni_660x_init_tio_chips()
987 ni_660x_write(dev, chip, devpriv->dma_cfg[chip], in ni_660x_init_tio_chips()
/linux/drivers/mtd/nand/raw/
H A Dstm32_fmc2_nand.c351 struct dma_slave_config dma_cfg; in stm32_fmc2_nfc_select_chip() local
362 memset(&dma_cfg, 0, sizeof(dma_cfg)); in stm32_fmc2_nfc_select_chip()
363 dma_cfg.dst_addr = nfc->data_phys_addr[nfc->cs_sel]; in stm32_fmc2_nfc_select_chip()
364 dma_cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; in stm32_fmc2_nfc_select_chip()
365 dma_cfg.dst_maxburst = nfc->tx_dma_max_burst / in stm32_fmc2_nfc_select_chip()
366 dma_cfg.dst_addr_width; in stm32_fmc2_nfc_select_chip()
368 ret = dmaengine_slave_config(nfc->dma_tx_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
376 memset(&dma_cfg, 0, sizeof(dma_cfg)); in stm32_fmc2_nfc_select_chip()
377 dma_cfg.src_addr = nfc->data_phys_addr[nfc->cs_sel]; in stm32_fmc2_nfc_select_chip()
378 dma_cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; in stm32_fmc2_nfc_select_chip()
[all …]
/linux/drivers/staging/media/atomisp/pci/runtime/isys/src/
H A Dvirtual_isys.c459 &channel_cfg->dma_cfg); in calculate_input_system_channel_cfg()
699 cfg->dma_cfg.channel = channel->dma_channel; in calculate_ibuf_ctrl_cfg()
700 cfg->dma_cfg.cmd = _DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND; in calculate_ibuf_ctrl_cfg()
702 cfg->dma_cfg.shift_returned_items = 0; in calculate_ibuf_ctrl_cfg()
703 cfg->dma_cfg.elems_per_word_in_ibuf = 0; in calculate_ibuf_ctrl_cfg()
704 cfg->dma_cfg.elems_per_word_in_dest = 0; in calculate_ibuf_ctrl_cfg()
/linux/drivers/leds/
H A Dleds-sun50i-a100.c390 struct dma_slave_config dma_cfg = {}; in sun50i_a100_ledc_probe() local
472 dma_cfg.dst_addr = mem->start + LEDC_DATA_REG; in sun50i_a100_ledc_probe()
473 dma_cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; in sun50i_a100_ledc_probe()
474 dma_cfg.dst_maxburst = LEDC_FIFO_DEPTH / 2; in sun50i_a100_ledc_probe()
476 ret = dmaengine_slave_config(priv->dma_chan, &dma_cfg); in sun50i_a100_ledc_probe()
/linux/sound/soc/qcom/qdsp6/
H A Dq6afe.c521 struct afe_param_id_cdc_dma_cfg dma_cfg; member
1468 struct afe_param_id_cdc_dma_cfg *dma_cfg = &pcfg->dma_cfg; in q6afe_cdc_dma_port_prepare() local
1470 dma_cfg->cdc_dma_cfg_minor_version = AFE_API_VERSION_CODEC_DMA_CONFIG; in q6afe_cdc_dma_port_prepare()
1471 dma_cfg->sample_rate = cfg->sample_rate; in q6afe_cdc_dma_port_prepare()
1472 dma_cfg->bit_width = cfg->bit_width; in q6afe_cdc_dma_port_prepare()
1473 dma_cfg->data_format = cfg->data_format; in q6afe_cdc_dma_port_prepare()
1474 dma_cfg->num_channels = cfg->num_channels; in q6afe_cdc_dma_port_prepare()
1476 dma_cfg->active_channels_mask = (1 << cfg->num_channels) - 1; in q6afe_cdc_dma_port_prepare()
H A Dq6afe.h212 struct q6afe_cdc_dma_cfg dma_cfg; member
H A Dq6afe-dai.c260 struct q6afe_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg; in q6dma_set_channel_map()
329 struct q6afe_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg; in q6dma_hw_params()
395 &dai_data->port_config[dai->id].dma_cfg); in q6afe_dai_prepare()
/linux/arch/mips/loongson32/common/
H A Dplatform.c136 .dma_cfg = &ls1x_eth_dma_cfg,
173 .dma_cfg = &ls1x_eth_dma_cfg,
/linux/include/linux/
H A Dsxgbe_platform.h45 struct sxgbe_dma_cfg *dma_cfg; member
H A Dstmmac.h207 struct stmmac_dma_cfg *dma_cfg; member
/linux/drivers/gpu/drm/kmb/
H A Dkmb_plane.c354 unsigned int dma_cfg; in kmb_plane_atomic_update() local
522 dma_cfg = LCD_DMA_LAYER_ENABLE | LCD_DMA_LAYER_VSTRIDE_EN | in kmb_plane_atomic_update()
526 kmb_write_lcd(kmb, LCD_LAYERn_DMA_CFG(plane_id), dma_cfg); in kmb_plane_atomic_update()
537 drm_dbg(&kmb->drm, "dma_cfg=0x%x LCD_DMA_CFG=0x%x\n", dma_cfg, in kmb_plane_atomic_update()

12