| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_rq_dlg_helpers.c | 191 …dlg_regs_st(struct display_mode_lib *mode_lib, const struct _vcs_dpi_display_dlg_regs_st *dlg_regs) in print__dlg_regs_st() argument
197 dlg_regs->refcyc_h_blank_end); in print__dlg_regs_st()
200 dlg_regs->dlg_vblank_end); in print__dlg_regs_st()
203 dlg_regs->min_dst_y_next_start); in print__dlg_regs_st()
206 dlg_regs->refcyc_per_htotal); in print__dlg_regs_st()
209 dlg_regs->refcyc_x_after_scaler); in print__dlg_regs_st()
212 dlg_regs->dst_y_after_scaler); in print__dlg_regs_st()
215 dlg_regs->dst_y_prefetch); in print__dlg_regs_st()
218 dlg_regs->dst_y_per_vm_vblank); in print__dlg_regs_st()
221 dlg_regs->dst_y_per_row_vblank); in print__dlg_regs_st()
[all …]
|
| H A D | display_mode_lib.h | 53 display_dlg_regs_st *dlg_regs,
71 display_dlg_regs_st *dlg_regs,
|
| H A D | dml1_display_rq_dlg_calc.h | 56 struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
|
| H A D | display_rq_dlg_helpers.h | 43 …lg_regs_st(struct display_mode_lib *mode_lib, const struct _vcs_dpi_display_dlg_regs_st *dlg_regs);
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | display_rq_dlg_calc_32.c | 207 display_dlg_regs_st *dlg_regs, in dml32_rq_dlg_get_dlg_reg() argument
266 memset(dlg_regs, 0, sizeof(*dlg_regs)); in dml32_rq_dlg_get_dlg_reg()
275 dlg_regs->ref_freq_to_pix_freq = (unsigned int) (ref_freq_to_pix_freq * dml_pow(2, 19)); in dml32_rq_dlg_get_dlg_reg()
276 …dlg_regs->refcyc_per_htotal = (unsigned int) (ref_freq_to_pix_freq * (double) htotal * dml_pow(2, … in dml32_rq_dlg_get_dlg_reg()
277 dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits in dml32_rq_dlg_get_dlg_reg()
290 dlg_regs->vready_after_vcount0 = vready_after_vcount0; in dml32_rq_dlg_get_dlg_reg()
292 dml_print("DML_DLG: %s: vready_after_vcount0 = %d\n", __func__, dlg_regs->vready_after_vcount0); in dml32_rq_dlg_get_dlg_reg()
334 dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end * ref_freq_to_pix_freq); in dml32_rq_dlg_get_dlg_reg()
341 dlg_regs->refcyc_h_blank_end = (unsigned int) (((double) hblank_end in dml32_rq_dlg_get_dlg_reg()
345 ASSERT(dlg_regs->refcyc_h_blank_end < (unsigned int)dml_pow(2, 13)); in dml32_rq_dlg_get_dlg_reg()
[all …]
|
| H A D | display_rq_dlg_calc_32.h | 64 display_dlg_regs_st *dlg_regs,
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| H A D | dml21_utils.c | 177 memset(&out->dlg_regs, 0, sizeof(out->dlg_regs)); in dml21_update_pipe_ctx_dchub_regs()
178 out->dlg_regs.refcyc_h_blank_end = disp_dlg_regs->refcyc_h_blank_end; in dml21_update_pipe_ctx_dchub_regs()
179 out->dlg_regs.dlg_vblank_end = disp_dlg_regs->dlg_vblank_end; in dml21_update_pipe_ctx_dchub_regs()
180 out->dlg_regs.min_dst_y_next_start = disp_dlg_regs->min_dst_y_next_start; in dml21_update_pipe_ctx_dchub_regs()
181 out->dlg_regs.refcyc_per_htotal = disp_dlg_regs->refcyc_per_htotal; in dml21_update_pipe_ctx_dchub_regs()
182 out->dlg_regs.refcyc_x_after_scaler = disp_dlg_regs->refcyc_x_after_scaler; in dml21_update_pipe_ctx_dchub_regs()
183 out->dlg_regs.dst_y_after_scaler = disp_dlg_regs->dst_y_after_scaler; in dml21_update_pipe_ctx_dchub_regs()
184 out->dlg_regs.dst_y_prefetch = disp_dlg_regs->dst_y_prefetch; in dml21_update_pipe_ctx_dchub_regs()
185 out->dlg_regs.dst_y_per_vm_vblank = disp_dlg_regs->dst_y_per_vm_vblank; in dml21_update_pipe_ctx_dchub_regs()
186 out->dlg_regs.dst_y_per_row_vblank = disp_dlg_regs->dst_y_per_row_vblank; in dml21_update_pipe_ctx_dchub_regs()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2/ |
| H A D | display_mode_util.c | 249 void dml_print_dlg_regs_st(const dml_display_dlg_regs_st *dlg_regs) in dml_print_dlg_regs_st() argument
253 dml_print("DML: refcyc_h_blank_end = 0x%x\n", dlg_regs->refcyc_h_blank_end); in dml_print_dlg_regs_st()
254 dml_print("DML: dlg_vblank_end = 0x%x\n", dlg_regs->dlg_vblank_end); in dml_print_dlg_regs_st()
255 dml_print("DML: min_dst_y_next_start = 0x%x\n", dlg_regs->min_dst_y_next_start); in dml_print_dlg_regs_st()
256 dml_print("DML: refcyc_per_htotal = 0x%x\n", dlg_regs->refcyc_per_htotal); in dml_print_dlg_regs_st()
257 dml_print("DML: refcyc_x_after_scaler = 0x%x\n", dlg_regs->refcyc_x_after_scaler); in dml_print_dlg_regs_st()
258 dml_print("DML: dst_y_after_scaler = 0x%x\n", dlg_regs->dst_y_after_scaler); in dml_print_dlg_regs_st()
259 dml_print("DML: dst_y_prefetch = 0x%x\n", dlg_regs->dst_y_prefetch); in dml_print_dlg_regs_st()
260 dml_print("DML: dst_y_per_vm_vblank = 0x%x\n", dlg_regs->dst_y_per_vm_vblank); in dml_print_dlg_regs_st()
261 dml_print("DML: dst_y_per_row_vblank = 0x%x\n", dlg_regs->dst_y_per_row_vblank); in dml_print_dlg_regs_st()
[all …]
|
| H A D | dml2_translation_helper.c | 1434 memset(&out->dlg_regs, 0, sizeof(out->dlg_regs)); in dml2_update_pipe_ctx_dchub_regs()
1435 out->dlg_regs.refcyc_h_blank_end = disp_dlg_regs->refcyc_h_blank_end; in dml2_update_pipe_ctx_dchub_regs()
1436 out->dlg_regs.dlg_vblank_end = disp_dlg_regs->dlg_vblank_end; in dml2_update_pipe_ctx_dchub_regs()
1437 out->dlg_regs.min_dst_y_next_start = disp_dlg_regs->min_dst_y_next_start; in dml2_update_pipe_ctx_dchub_regs()
1438 out->dlg_regs.refcyc_per_htotal = disp_dlg_regs->refcyc_per_htotal; in dml2_update_pipe_ctx_dchub_regs()
1439 out->dlg_regs.refcyc_x_after_scaler = disp_dlg_regs->refcyc_x_after_scaler; in dml2_update_pipe_ctx_dchub_regs()
1440 out->dlg_regs.dst_y_after_scaler = disp_dlg_regs->dst_y_after_scaler; in dml2_update_pipe_ctx_dchub_regs()
1441 out->dlg_regs.dst_y_prefetch = disp_dlg_regs->dst_y_prefetch; in dml2_update_pipe_ctx_dchub_regs()
1442 out->dlg_regs.dst_y_per_vm_vblank = disp_dlg_regs->dst_y_per_vm_vblank; in dml2_update_pipe_ctx_dchub_regs()
1443 out->dlg_regs.dst_y_per_row_vblank = disp_dlg_regs->dst_y_per_row_vblank; in dml2_update_pipe_ctx_dchub_regs()
[all …]
|
| H A D | dml_display_rq_dlg_calc.h | 55 void dml_rq_dlg_get_dlg_reg(dml_display_dlg_regs_st *dlg_regs,
|
| H A D | display_mode_util.h | 56 __DML_DLL_EXPORT__ void dml_print_dlg_regs_st(const dml_display_dlg_regs_st *dlg_regs);
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_hwseq.c | 240 struct _vcs_dpi_display_dlg_regs_st *dlg_regs = &s->dlg_attr; in dcn10_log_hubp_states() local
246 …pool->hubps[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_… in dcn10_log_hubp_states()
247 dlg_regs->refcyc_per_htotal, dlg_regs->refcyc_x_after_scaler, dlg_regs->dst_y_after_scaler, in dcn10_log_hubp_states()
248 dlg_regs->dst_y_prefetch, dlg_regs->dst_y_per_vm_vblank, dlg_regs->dst_y_per_row_vblank, in dcn10_log_hubp_states()
249 dlg_regs->dst_y_per_vm_flip, dlg_regs->dst_y_per_row_flip, dlg_regs->ref_freq_to_pix_freq, in dcn10_log_hubp_states()
250 dlg_regs->vratio_prefetch, dlg_regs->vratio_prefetch_c, dlg_regs->refcyc_per_pte_group_vblank_l, in dcn10_log_hubp_states()
251 dlg_regs->refcyc_per_pte_group_vblank_c, dlg_regs->refcyc_per_meta_chunk_vblank_l, in dcn10_log_hubp_states()
252 dlg_regs->refcyc_per_meta_chunk_vblank_c, dlg_regs->refcyc_per_pte_group_flip_l, in dcn10_log_hubp_states()
253 dlg_regs->refcyc_per_pte_group_flip_c, dlg_regs->refcyc_per_meta_chunk_flip_l, in dcn10_log_hubp_states()
254 dlg_regs->refcyc_per_meta_chunk_flip_c, dlg_regs->dst_y_per_pte_row_nom_l, in dcn10_log_hubp_states()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| H A D | display_rq_dlg_calc_21.h | 62 display_dlg_regs_st *dlg_regs,
|
| H A D | display_rq_dlg_calc_21.c | 1639 display_dlg_regs_st *dlg_regs, in dml21_rq_dlg_get_dlg_reg() argument
1683 dlg_regs, in dml21_rq_dlg_get_dlg_reg()
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | display_rq_dlg_calc_20.h | 62 display_dlg_regs_st *dlg_regs,
|
| H A D | display_rq_dlg_calc_20v2.h | 62 display_dlg_regs_st *dlg_regs,
|
| H A D | display_rq_dlg_calc_20.c | 1530 display_dlg_regs_st *dlg_regs, in dml20_rq_dlg_get_dlg_reg() argument
1570 dlg_regs, in dml20_rq_dlg_get_dlg_reg()
|
| H A D | display_rq_dlg_calc_20v2.c | 1531 display_dlg_regs_st *dlg_regs, in dml20v2_rq_dlg_get_dlg_reg() argument
1571 dlg_regs, in dml20v2_rq_dlg_get_dlg_reg()
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | display_rq_dlg_calc_31.h | 58 display_dlg_regs_st *dlg_regs,
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | display_rq_dlg_calc_314.h | 59 display_dlg_regs_st *dlg_regs,
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_rq_dlg_calc_30.h | 58 display_dlg_regs_st *dlg_regs,
|
| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | hubp.h | 142 struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
149 struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
|
| H A D | mem_input.h | 107 struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/ |
| H A D | dml_top_dchub_registers.h | 149 struct dml2_display_dlg_regs dlg_regs; member
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| H A D | dcn_calcs.c | 459 struct _vcs_dpi_display_dlg_regs_st *dlg_regs = &pipe->dlg_regs; in dcn_bw_calc_rq_dlg_ttu() local
470 memset(dlg_regs, 0, sizeof(*dlg_regs)); in dcn_bw_calc_rq_dlg_ttu()
511 dlg_regs, in dcn_bw_calc_rq_dlg_ttu()
|