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Searched refs:div_h (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/clk/bcm/
H A Dclk-iproc-asiu.c74 unsigned int div_h, div_l; in iproc_asiu_clk_recalc_rate() local
89 div_h = (val >> clk->div.high_shift) & bit_mask(clk->div.high_width); in iproc_asiu_clk_recalc_rate()
90 div_h++; in iproc_asiu_clk_recalc_rate()
94 clk->rate = parent_rate / (div_h + div_l); in iproc_asiu_clk_recalc_rate()
96 __func__, clk->rate, parent_rate, div_h, div_l); in iproc_asiu_clk_recalc_rate()
124 unsigned int div, div_h, div_l; in iproc_asiu_clk_set_rate() local
142 div_h = div_l = div >> 1; in iproc_asiu_clk_set_rate()
143 div_h--; in iproc_asiu_clk_set_rate()
148 if (div_h) { in iproc_asiu_clk_set_rate()
151 val |= div_h << clk->div.high_shift; in iproc_asiu_clk_set_rate()
/linux/drivers/hwmon/
H A Daspeed-g6-pwm-tach.c156 u64 div_h, div_l, duty_cycle_period, dividend; in aspeed_pwm_get_state() local
162 div_h = FIELD_GET(PWM_ASPEED_CTRL_CLK_DIV_H, val); in aspeed_pwm_get_state()
172 << div_h; in aspeed_pwm_get_state()
177 << div_h; in aspeed_pwm_get_state()
192 u64 div_h, div_l, divisor, expect_period; in aspeed_pwm_apply() local
205 div_h = order_base_2(DIV64_U64_ROUND_UP(priv->clk_rate * expect_period, divisor)); in aspeed_pwm_apply()
206 if (div_h > 0xf) in aspeed_pwm_apply()
207 div_h = 0xf; in aspeed_pwm_apply()
209 divisor = ((u64)NSEC_PER_SEC * (PWM_ASPEED_FIXED_PERIOD + 1)) << div_h; in aspeed_pwm_apply()
221 priv->clk_rate, div_h, div_l); in aspeed_pwm_apply()
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H A Daspeed-pwm-tacho.c508 u8 clk_unit, div_h, div_l, tacho_div; in aspeed_get_fan_tach_ch_measure_period() local
512 div_h = priv->type_pwm_clock_division_h[type]; in aspeed_get_fan_tach_ch_measure_period()
513 div_h = 0x1 << div_h; in aspeed_get_fan_tach_ch_measure_period()
524 return clk / (clk_unit * div_h * div_l * tacho_div * tacho_unit); in aspeed_get_fan_tach_ch_measure_period()
/linux/drivers/i2c/busses/
H A Di2c-meson.c142 unsigned int div_h, div_l; in meson_gxbb_axg_i2c_set_clk_div() local
152 div_h = DIV_ROUND_UP(clk_rate, freq); in meson_gxbb_axg_i2c_set_clk_div()
153 div_l = DIV_ROUND_UP(div_h, 4); in meson_gxbb_axg_i2c_set_clk_div()
154 div_h = DIV_ROUND_UP(div_h, 2) - FILTER_DELAY; in meson_gxbb_axg_i2c_set_clk_div()
156 div_h = DIV_ROUND_UP(clk_rate * 2, freq * 5) - FILTER_DELAY; in meson_gxbb_axg_i2c_set_clk_div()
161 if (div_h > GENMASK(11, 0)) { in meson_gxbb_axg_i2c_set_clk_div()
163 div_h = GENMASK(11, 0); in meson_gxbb_axg_i2c_set_clk_div()
171 FIELD_PREP(REG_CTRL_CLKDIV_MASK, div_h & GENMASK(9, 0))); in meson_gxbb_axg_i2c_set_clk_div()
174 FIELD_PREP(REG_CTRL_CLKDIVEXT_MASK, div_h >> 10)); in meson_gxbb_axg_i2c_set_clk_div()
184 clk_rate, freq, div_h, div_l); in meson_gxbb_axg_i2c_set_clk_div()