Searched refs:div3_ctrl_value (Results 1 – 1 of 1) sorted by relevance
85 u8 div3_ctrl_value; in mtk_hdmi_pll_set_hw() 116 div3_ctrl_value = 0x0; in mtk_hdmi_pll_set_hw() 120 div3_ctrl_value = 0x0; in mtk_hdmi_pll_set_hw() 124 div3_ctrl_value = 0x1; in mtk_hdmi_pll_set_hw() 128 div3_ctrl_value = 0x1; in mtk_hdmi_pll_set_hw() 135 mtk_phy_update_field(regs + HDMI_1_PLL_CFG_4, RG_HDMITXPLL_POSDIV_DIV3_CTRL, div3_ctrl_value); in mtk_hdmi_pll_set_hw() 83 u8 div3_ctrl_value; mtk_hdmi_pll_set_hw() local