Searched refs:dim1 (Results 1 – 6 of 6) sorted by relevance
68 volatile unsigned long *dim0, *dim1, *dim2, *dim3; in titan_update_irq_hw() local84 dim1 = &cchip->dim1.csr; in titan_update_irq_hw()88 if (!cpumask_test_cpu(1, &cpm)) dim1 = &dummy; in titan_update_irq_hw()93 *dim1 = mask1; in titan_update_irq_hw()98 *dim1; in titan_update_irq_hw()104 if (bcpu == 1) dimB = &cchip->dim1.csr; in titan_update_irq_hw()
400 printk("%s: CSR_DIM1 0x%lx\n", __func__, TSUNAMI_cchip->dim1.csr); in tsunami_init_arch()
376 printk("%s: CSR_DIM1 0x%lx\n", __func__, TITAN_cchip->dim1.csr); in titan_init_arch()
44 tsunami_64 dim1; member
45 titan_64 dim1; member
2940 tr_req[tr_idx].dim1 = tr0_cnt0; in udma_prep_slave_sg_tr()2953 tr_req[tr_idx].dim1 = tr1_cnt0; in udma_prep_slave_sg_tr()3082 tr_req[tr_idx].dim1 = (-1) * tr_cnt0; in udma_prep_slave_sg_triggered_tr()3098 tr_req[tr_idx].dim1 = tr_cnt0; in udma_prep_slave_sg_triggered_tr()3129 tr_req[tr_idx].dim1 = (-1) * tr_cnt0; in udma_prep_slave_sg_triggered_tr()3144 tr_req[tr_idx].dim1 = tr_cnt0; in udma_prep_slave_sg_triggered_tr()3546 tr_req[tr_idx].dim1 = tr0_cnt0; in udma_prep_dma_cyclic_tr()3560 tr_req[tr_idx].dim1 = tr1_cnt0; in udma_prep_dma_cyclic_tr()3767 tr_req[0].dim1 = tr0_cnt0; in udma_prep_dma_memcpy()