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Searched refs:devm_clk_hw_register_divider_parent_hw (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/msm/dsi/phy/
H A Ddsi_phy_10nm.c590 pll_out_div = devm_clk_hw_register_divider_parent_hw(dev, clk_name, in pll_10nm_register()
603 pll_bit = devm_clk_hw_register_divider_parent_hw(dev, clk_name, in pll_10nm_register()
660 hw = devm_clk_hw_register_divider_parent_hw(dev, clk_name, pclk_mux, in pll_10nm_register()
H A Ddsi_phy_7nm.c660 pll_out_div = devm_clk_hw_register_divider_parent_hw(dev, clk_name, in pll_7nm_register()
673 pll_bit = devm_clk_hw_register_divider_parent_hw(dev, clk_name, in pll_7nm_register()
748 hw = devm_clk_hw_register_divider_parent_hw(dev, clk_name, in pll_7nm_register()
H A Ddsi_phy_28nm.c649 analog_postdiv = devm_clk_hw_register_divider_parent_hw(dev, clk_name, in pll_28nm_register()
664 hw = devm_clk_hw_register_divider_parent_hw(dev, clk_name, in pll_28nm_register()
H A Ddsi_phy_28nm_8960.c430 hw = devm_clk_hw_register_divider_parent_hw(dev, clk_name, in pll_28nm_register()
/linux/include/linux/
H A Dclk-provider.h920 #define devm_clk_hw_register_divider_parent_hw(dev, name, parent_hw, flags, \ macro