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Searched refs:devfn (Results 1 – 25 of 403) sorted by relevance

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/linux/drivers/pci/hotplug/
H A Dcpci_hotplug_pci.c39 slot->devfn, in cpci_get_attention_status()
45 slot->devfn, in cpci_get_attention_status()
59 slot->devfn, in cpci_set_attention_status()
64 slot->devfn, in cpci_set_attention_status()
73 slot->devfn, in cpci_set_attention_status()
86 slot->devfn, in cpci_get_hs_csr()
91 slot->devfn, in cpci_get_hs_csr()
105 slot->devfn, in cpci_check_and_clear_ins()
110 slot->devfn, in cpci_check_and_clear_ins()
117 slot->devfn, in cpci_check_and_clear_ins()
[all …]
H A Dibmphp_pci.c93 unsigned int devfn = PCI_DEVFN(device, function); in ibmphp_configure_card() local
101 pci_bus_read_config_word(ibmphp_pci_bus, devfn, PCI_VENDOR_ID, &vendor_id); in ibmphp_configure_card()
115 pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_HEADER_TYPE, &hdr_type); in ibmphp_configure_card()
116 pci_bus_read_config_dword(ibmphp_pci_bus, devfn, PCI_CLASS_REVISION, &class); in ibmphp_configure_card()
188 pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_SECONDARY_BUS, &sec_number); in ibmphp_configure_card()
258 pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_SECONDARY_BUS, &sec_number); in ibmphp_configure_card()
348 unsigned int devfn; in configure_device() local
352 devfn = PCI_DEVFN(func->device, func->function); in configure_device()
370 pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFF); in configure_device()
371 pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &bar[count]); in configure_device()
[all …]
/linux/arch/mips/pci/
H A Dops-sni.c24 static int set_config_address(unsigned int busno, unsigned int devfn, int reg) in set_config_address() argument
26 if ((devfn > 255) || (reg > 255)) in set_config_address()
29 if (busno == 0 && devfn >= PCI_DEVFN(8, 0)) in set_config_address()
34 ((devfn & 0xff) << 8) | in set_config_address()
40 static int pcimt_read(struct pci_bus *bus, unsigned int devfn, int reg, in pcimt_read() argument
45 if ((res = set_config_address(bus->number, devfn, reg))) in pcimt_read()
63 static int pcimt_write(struct pci_bus *bus, unsigned int devfn, int reg, in pcimt_write() argument
68 if ((res = set_config_address(bus->number, devfn, reg))) in pcimt_write()
91 static int pcit_set_config_address(unsigned int busno, unsigned int devfn, int reg) in pcit_set_config_address() argument
93 if ((devfn > 255) || (reg > 255) || (busno > 255)) in pcit_set_config_address()
[all …]
H A Dops-loongson2.c34 unsigned int devfn, int where, in loongson_pcibios_config_access() argument
41 int device = PCI_SLOT(devfn); in loongson_pcibios_config_access()
42 int function = PCI_FUNC(devfn); in loongson_pcibios_config_access()
118 static int loongson_pcibios_read(struct pci_bus *bus, unsigned int devfn, in loongson_pcibios_read() argument
128 if (loongson_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, in loongson_pcibios_read()
142 static int loongson_pcibios_write(struct pci_bus *bus, unsigned int devfn, in loongson_pcibios_write() argument
155 if (loongson_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, in loongson_pcibios_write()
167 if (loongson_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where, in loongson_pcibios_write()
187 u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0); in _rdmsr() local
191 loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr); in _rdmsr()
[all …]
H A Dops-bcm63xx.c65 unsigned int devfn, int where) in bcm63xx_setup_cfg_access() argument
70 slot = PCI_SLOT(devfn); in bcm63xx_setup_cfg_access()
71 func = PCI_FUNC(devfn); in bcm63xx_setup_cfg_access()
101 unsigned int devfn, int where, int size, in bcm63xx_do_cfg_read() argument
109 if (bcm63xx_setup_cfg_access(type, busn, devfn, where)) in bcm63xx_do_cfg_read()
122 unsigned int devfn, int where, int size, in bcm63xx_do_cfg_write() argument
130 if (bcm63xx_setup_cfg_access(type, busn, devfn, where)) in bcm63xx_do_cfg_write()
147 static int bcm63xx_pci_read(struct pci_bus *bus, unsigned int devfn, in bcm63xx_pci_read() argument
154 if (type == 0 && PCI_SLOT(devfn) == CARDBUS_PCI_IDSEL) in bcm63xx_pci_read()
157 return bcm63xx_do_cfg_read(type, bus->number, devfn, in bcm63xx_pci_read()
[all …]
H A Dpci-bcm1480ht.c38 #define CFGOFFSET(bus, devfn, where) (((bus)<<16)+((devfn)<<8)+(where)) argument
39 #define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where) argument
75 static int bcm1480ht_can_access(struct pci_bus *bus, int devfn) in bcm1480ht_can_access() argument
83 devno = PCI_SLOT(devfn); in bcm1480ht_can_access()
96 static int bcm1480ht_pcibios_read(struct pci_bus *bus, unsigned int devfn, in bcm1480ht_pcibios_read() argument
106 if (bcm1480ht_can_access(bus, devfn)) in bcm1480ht_pcibios_read()
107 data = READCFG32(CFGADDR(bus, devfn, where)); in bcm1480ht_pcibios_read()
121 static int bcm1480ht_pcibios_write(struct pci_bus *bus, unsigned int devfn, in bcm1480ht_pcibios_write() argument
124 u32 cfgaddr = CFGADDR(bus, devfn, where); in bcm1480ht_pcibios_write()
132 if (!bcm1480ht_can_access(bus, devfn)) in bcm1480ht_pcibios_write()
H A Dops-gt64xxx_pci0.c31 struct pci_bus *bus, unsigned int devfn, int where, u32 * data) in gt64xxx_pci0_pcibios_config_access() argument
36 if ((busnum == 0) && (devfn >= PCI_DEVFN(31, 0))) in gt64xxx_pci0_pcibios_config_access()
46 (devfn << GT_PCI0_CFGADDR_FUNCTNUM_SHF) | in gt64xxx_pci0_pcibios_config_access()
51 if (busnum == 0 && PCI_SLOT(devfn) == 0) { in gt64xxx_pci0_pcibios_config_access()
60 if (busnum == 0 && PCI_SLOT(devfn) == 0) { in gt64xxx_pci0_pcibios_config_access()
91 static int gt64xxx_pci0_pcibios_read(struct pci_bus *bus, unsigned int devfn, in gt64xxx_pci0_pcibios_read() argument
96 if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, in gt64xxx_pci0_pcibios_read()
110 static int gt64xxx_pci0_pcibios_write(struct pci_bus *bus, unsigned int devfn, in gt64xxx_pci0_pcibios_write() argument
119 devfn, where, &data)) in gt64xxx_pci0_pcibios_write()
130 if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, in gt64xxx_pci0_pcibios_write()
H A Dops-lantiq.c27 unsigned int devfn, unsigned int where, u32 *data) in ltq_pci_config_access() argument
35 if ((bus->number != 0) || ((devfn & 0xf8) > 0x78) in ltq_pci_config_access()
36 || ((devfn & 0xf8) == 0) || ((devfn & 0xf8) == 0x68)) in ltq_pci_config_access()
42 cfg_base |= (bus->number << LTQ_PCI_CFG_BUSNUM_SHF) | (devfn << in ltq_pci_config_access()
71 int ltq_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn, in ltq_pci_read_config_dword() argument
76 if (ltq_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) in ltq_pci_read_config_dword()
89 int ltq_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn, in ltq_pci_write_config_dword() argument
98 devfn, where, &data)) in ltq_pci_write_config_dword()
109 if (ltq_pci_config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) in ltq_pci_write_config_dword()
H A Dpci-bcm1480.c40 #define CFGOFFSET(bus, devfn, where) (((bus)<<16)+((devfn)<<8)+(where)) argument
41 #define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where) argument
84 static int bcm1480_pci_can_access(struct pci_bus *bus, int devfn) in bcm1480_pci_can_access() argument
92 devno = PCI_SLOT(devfn); in bcm1480_pci_can_access()
107 static int bcm1480_pcibios_read(struct pci_bus *bus, unsigned int devfn, in bcm1480_pcibios_read() argument
117 if (bcm1480_pci_can_access(bus, devfn)) in bcm1480_pcibios_read()
118 data = READCFG32(CFGADDR(bus, devfn, where)); in bcm1480_pcibios_read()
132 static int bcm1480_pcibios_write(struct pci_bus *bus, unsigned int devfn, in bcm1480_pcibios_write() argument
135 u32 cfgaddr = CFGADDR(bus, devfn, where); in bcm1480_pcibios_write()
143 if (!bcm1480_pci_can_access(bus, devfn)) in bcm1480_pcibios_write()
H A Dpci-sb1250.c40 #define CFGOFFSET(bus, devfn, where) (((bus)<<16) + ((devfn)<<8) + (where)) argument
41 #define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where) argument
91 static int sb1250_pci_can_access(struct pci_bus *bus, int devfn) in sb1250_pci_can_access() argument
99 devno = PCI_SLOT(devfn); in sb1250_pci_can_access()
116 static int sb1250_pcibios_read(struct pci_bus *bus, unsigned int devfn, in sb1250_pcibios_read() argument
126 if (sb1250_pci_can_access(bus, devfn)) in sb1250_pcibios_read()
127 data = READCFG32(CFGADDR(bus, devfn, where)); in sb1250_pcibios_read()
141 static int sb1250_pcibios_write(struct pci_bus *bus, unsigned int devfn, in sb1250_pcibios_write() argument
144 u32 cfgaddr = CFGADDR(bus, devfn, where); in sb1250_pcibios_write()
152 if (!sb1250_pci_can_access(bus, devfn)) in sb1250_pcibios_write()
/linux/arch/x86/pci/
H A Ddirect.c17 #define PCI_CONF1_ADDRESS(bus, devfn, reg) \ argument
19 | (devfn << 8) | (reg & 0xFC))
22 unsigned int devfn, int reg, int len, u32 *value) in pci_conf1_read() argument
26 if (seg || (bus > 255) || (devfn > 255) || (reg > 4095)) { in pci_conf1_read()
33 outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8); in pci_conf1_read()
53 unsigned int devfn, int reg, int len, u32 value) in pci_conf1_write() argument
57 if (seg || (bus > 255) || (devfn > 255) || (reg > 4095)) in pci_conf1_write()
62 outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8); in pci_conf1_write()
96 unsigned int devfn, int reg, int len, u32 *value) in pci_conf2_read() argument
102 if ((bus > 255) || (devfn > 255) || (reg > 255)) { in pci_conf2_read()
[all …]
H A Dintel_mid_pci.c65 static int fixed_bar_cap(struct pci_bus *bus, unsigned int devfn) in fixed_bar_cap() argument
77 devfn, pos, 4, &pcie_cap)) in fixed_bar_cap()
86 devfn, pos + 4, 4, &cap_data); in fixed_bar_cap()
97 static int pci_device_update_fixed(struct pci_bus *bus, unsigned int devfn, in pci_device_update_fixed() argument
110 raw_pci_ext_ops->read(domain, busnum, devfn, in pci_device_update_fixed()
133 return raw_pci_ext_ops->write(domain, busnum, devfn, reg, 4, in pci_device_update_fixed()
138 return raw_pci_ext_ops->write(domain, busnum, devfn, reg, len, val); in pci_device_update_fixed()
152 static bool type1_access_ok(unsigned int bus, unsigned int devfn, int reg) in type1_access_ok() argument
164 if (bus == 0 && (devfn == PCI_DEVFN(2, 0) in type1_access_ok()
165 || devfn == PCI_DEVFN(0, 0) in type1_access_ok()
[all …]
H A Dnumachip.c19 static inline char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn) in pci_dev_base() argument
24 return cfg->virt + (PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12)); in pci_dev_base()
29 unsigned int devfn, int reg, int len, u32 *value) in pci_mmcfg_read_numachip() argument
34 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) { in pci_mmcfg_read_numachip()
40 if (unlikely(bus == 0 && devfn >= limit)) { in pci_mmcfg_read_numachip()
46 addr = pci_dev_base(seg, bus, devfn); in pci_mmcfg_read_numachip()
69 unsigned int devfn, int reg, int len, u32 value) in pci_mmcfg_write_numachip() argument
74 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) in pci_mmcfg_write_numachip()
78 if (unlikely(bus == 0 && devfn >= limit)) in pci_mmcfg_write_numachip()
82 addr = pci_dev_base(seg, bus, devfn); in pci_mmcfg_write_numachip()
H A Dmmconfig_32.c27 static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn) in get_base_addr() argument
39 static void pci_exp_set_dev_base(unsigned int base, int bus, int devfn) in pci_exp_set_dev_base() argument
41 u32 dev_base = base | PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12); in pci_exp_set_dev_base()
52 unsigned int devfn, int reg, int len, u32 *value) in pci_mmcfg_read() argument
57 if ((bus > 255) || (devfn > 255) || (reg > 4095)) { in pci_mmcfg_read()
63 base = get_base_addr(seg, bus, devfn); in pci_mmcfg_read()
71 pci_exp_set_dev_base(base, bus, devfn); in pci_mmcfg_read()
91 unsigned int devfn, int reg, int len, u32 value) in pci_mmcfg_write() argument
96 if ((bus > 255) || (devfn > 255) || (reg > 4095)) in pci_mmcfg_write()
100 base = get_base_addr(seg, bus, devfn); in pci_mmcfg_write()
[all …]
/linux/drivers/platform/x86/
H A Dp2sb.c48 static void p2sb_get_devfn(unsigned int *devfn) in p2sb_get_devfn() argument
57 *devfn = fn; in p2sb_get_devfn()
84 static void p2sb_scan_and_cache_devfn(struct pci_bus *bus, unsigned int devfn) in p2sb_scan_and_cache_devfn() argument
86 struct p2sb_res_cache *cache = &p2sb_resources[PCI_FUNC(devfn)]; in p2sb_scan_and_cache_devfn()
89 pdev = pci_scan_single_device(bus, devfn); in p2sb_scan_and_cache_devfn()
99 static int p2sb_scan_and_cache(struct pci_bus *bus, unsigned int devfn) in p2sb_scan_and_cache() argument
105 pci_bus_write_config_dword(bus, devfn, P2SBC, 0); in p2sb_scan_and_cache()
108 p2sb_scan_and_cache_devfn(bus, devfn); in p2sb_scan_and_cache()
111 if (devfn == P2SB_DEVFN_GOLDMONT) in p2sb_scan_and_cache()
114 pci_bus_write_config_dword(bus, devfn, P2SBC, P2SBC_HIDE); in p2sb_scan_and_cache()
[all …]
/linux/drivers/pci/controller/
H A Dpci-thunder-ecam.c30 unsigned int devfn, int where, int size, u32 *val) in handle_ea_bar() argument
43 addr = bus->ops->map_bus(bus, devfn, bar); /* BAR 0 */ in handle_ea_bar()
57 addr = bus->ops->map_bus(bus, devfn, bar); /* BAR 0 */ in handle_ea_bar()
72 addr = bus->ops->map_bus(bus, devfn, bar + 4); /* BAR 1 */ in handle_ea_bar()
83 static int thunder_ecam_p2_config_read(struct pci_bus *bus, unsigned int devfn, in thunder_ecam_p2_config_read() argument
100 return pci_generic_config_read(bus, devfn, where, size, val); in thunder_ecam_p2_config_read()
103 addr = bus->ops->map_bus(bus, devfn, where_a); in thunder_ecam_p2_config_read()
122 static int thunder_ecam_config_read(struct pci_bus *bus, unsigned int devfn, in thunder_ecam_config_read() argument
132 addr = bus->ops->map_bus(bus, devfn, 0xc); in thunder_ecam_config_read()
141 addr = bus->ops->map_bus(bus, devfn, 8); in thunder_ecam_config_read()
[all …]
/linux/arch/powerpc/platforms/pasemi/
H A Dpci.c26 #define PA_PXP_CFA(bus, devfn, off) (((bus) << 20) | ((devfn) << 12) | (off)) argument
28 static inline int pa_pxp_offset_valid(u8 bus, u8 devfn, int offset) in pa_pxp_offset_valid() argument
34 if (bus == 0 && devfn == 0) in pa_pxp_offset_valid()
41 u8 bus, u8 devfn, int offset) in pa_pxp_cfg_addr() argument
43 return hose->cfg_data + PA_PXP_CFA(bus, devfn, offset); in pa_pxp_cfg_addr()
46 static inline int is_root_port(int busno, int devfn) in is_root_port() argument
48 return ((busno == 0) && (PCI_FUNC(devfn) < 4) && in is_root_port()
49 ((PCI_SLOT(devfn) == 16) || (PCI_SLOT(devfn) == 17))); in is_root_port()
58 static int workaround_5945(struct pci_bus *bus, unsigned int devfn, in workaround_5945() argument
66 if (!is_root_port(bus->number, devfn) || !is_5945_reg(offset)) in workaround_5945()
[all …]
/linux/drivers/xen/
H A Dpci.c51 add->devfn = pci_dev->devfn; in xen_add_device()
61 add->physfn.devfn = physfn->devfn; in xen_add_device()
64 if (pci_ari_enabled(pci_dev->bus) && PCI_SLOT(pci_dev->devfn)) in xen_add_device()
115 .devfn = pci_dev->devfn, in xen_add_device()
118 .physfn.devfn = physfn->devfn, in xen_add_device()
125 else if (pci_ari_enabled(pci_dev->bus) && PCI_SLOT(pci_dev->devfn)) { in xen_add_device()
128 .devfn = pci_dev->devfn, in xen_add_device()
137 .devfn = pci_dev->devfn, in xen_add_device()
156 .devfn = pci_dev->devfn in xen_remove_device()
166 .devfn = pci_dev->devfn in xen_remove_device()
[all …]
/linux/arch/sparc/kernel/
H A Dpci_common.c22 unsigned long devfn, in config_out_of_range() argument
33 unsigned long devfn, in sun4u_config_mkaddr() argument
38 if (config_out_of_range(pbm, bus, devfn, reg)) in sun4u_config_mkaddr()
42 devfn <<= rbits; in sun4u_config_mkaddr()
45 return (void *) (pbm->config_space | bus | devfn | reg); in sun4u_config_mkaddr()
54 unsigned char bus, unsigned int devfn, in sun4u_read_pci_cfg_host() argument
61 addr = sun4u_config_mkaddr(pbm, bus, devfn, where); in sun4u_read_pci_cfg_host()
96 sun4u_read_pci_cfg_host(pbm, bus, devfn, in sun4u_read_pci_cfg_host()
101 sun4u_read_pci_cfg_host(pbm, bus, devfn, in sun4u_read_pci_cfg_host()
109 static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn, in sun4u_read_pci_cfg() argument
[all …]
H A Dleon_pci_grpci1.c104 unsigned int devfn, int where, u32 val);
119 unsigned int devfn, int where, u32 *val) in grpci1_cfg_r32() argument
127 devfn += (0x8 * 6); /* start at AD16=Device0 */ in grpci1_cfg_r32()
130 devfn = 0; /* special case: bridge controller itself */ in grpci1_cfg_r32()
138 pci_conf = (u32 *) (priv->pci_conf | (devfn << 8) | (where & 0xfc)); in grpci1_cfg_r32()
156 unsigned int devfn, int where, u32 *val) in grpci1_cfg_r16() argument
163 ret = grpci1_cfg_r32(priv, bus, devfn, where & ~0x3, &v); in grpci1_cfg_r16()
169 unsigned int devfn, int where, u32 *val) in grpci1_cfg_r8() argument
174 ret = grpci1_cfg_r32(priv, bus, devfn, where & ~0x3, &v); in grpci1_cfg_r8()
181 unsigned int devfn, int where, u32 val) in grpci1_cfg_w32() argument
[all …]
H A Dleon_pci_grpci2.c237 unsigned int devfn, int where, u32 *val) in grpci2_cfg_r32() argument
247 devfn += (0x8 * 6); /* start at AD16=Device0 */ in grpci2_cfg_r32()
250 devfn = 0; /* special case: bridge controller itself */ in grpci2_cfg_r32()
263 (devfn << 8) | (where & 0xfc)); in grpci2_cfg_r32()
283 unsigned int devfn, int where, u32 *val) in grpci2_cfg_r16() argument
290 ret = grpci2_cfg_r32(priv, bus, devfn, where & ~0x3, &v); in grpci2_cfg_r16()
296 unsigned int devfn, int where, u32 *val) in grpci2_cfg_r8() argument
301 ret = grpci2_cfg_r32(priv, bus, devfn, where & ~0x3, &v); in grpci2_cfg_r8()
308 unsigned int devfn, int where, u32 val) in grpci2_cfg_w32() argument
317 devfn += (0x8 * 6); /* start at AD16=Device0 */ in grpci2_cfg_w32()
[all …]
/linux/arch/powerpc/sysdev/
H A Dindirect_pci.c19 unsigned char bus_number, unsigned int devfn, in __indirect_read_config() argument
29 if (devfn != 0) in __indirect_read_config()
34 if (ppc_md.pci_exclude_device(hose, bus_number, devfn)) in __indirect_read_config()
51 (devfn << 8) | reg | cfg_type)); in __indirect_read_config()
54 (devfn << 8) | reg | cfg_type)); in __indirect_read_config()
75 int indirect_read_config(struct pci_bus *bus, unsigned int devfn, in indirect_read_config() argument
80 return __indirect_read_config(hose, bus->number, devfn, offset, len, in indirect_read_config()
84 int indirect_write_config(struct pci_bus *bus, unsigned int devfn, in indirect_write_config() argument
95 if (devfn != 0) in indirect_write_config()
100 if (ppc_md.pci_exclude_device(hose, bus->number, devfn)) in indirect_write_config()
[all …]
/linux/arch/powerpc/platforms/powermac/
H A Dpci.c124 #define MACRISC_CFA0(devfn, off) \ argument
129 #define MACRISC_CFA1(bus, devfn, off) \ argument
131 |(((unsigned int)(devfn)) << 8) \
173 static void __iomem *chaos_map_bus(struct pci_bus *bus, unsigned int devfn, in chaos_map_bus() argument
181 np = of_pci_find_child_device(bus->dev.of_node, devfn); in chaos_map_bus()
194 return macrisc_cfg_map_bus(bus, devfn, offset); in chaos_map_bus()
230 struct pci_bus *bus, unsigned int devfn) in u3_ht_skip_device() argument
242 else if (devfn == 0) in u3_ht_skip_device()
247 if (PCI_DN(dn) && PCI_DN(dn)->devfn == devfn) in u3_ht_skip_device()
263 #define U3_HT_CFA0(devfn, off) \ argument
[all …]
/linux/arch/alpha/kernel/
H A Dsys_miata.c185 if((slot == 7) && (PCI_FUNC(dev->devfn) == 3)) { in miata_map_irq()
186 struct pci_dev *pdev = pci_get_slot(dev->bus, dev->devfn & ~7); in miata_map_irq()
208 slot = PCI_SLOT(dev->devfn); in miata_swizzle()
211 else if ((PCI_SLOT(dev->bus->self->devfn) == 8) || in miata_swizzle()
212 (PCI_SLOT(dev->bus->self->devfn) == 20)) { in miata_swizzle()
213 slot = PCI_SLOT(dev->devfn) + 9; in miata_swizzle()
219 if ((PCI_SLOT(dev->bus->self->devfn) == 8) || in miata_swizzle()
220 (PCI_SLOT(dev->bus->self->devfn) == 20)) { in miata_swizzle()
221 slot = PCI_SLOT(dev->devfn) + 9; in miata_swizzle()
229 slot = PCI_SLOT(dev->devfn); in miata_swizzle()
/linux/arch/arm/mach-orion5x/
H A Dpci.c73 static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, in pcie_rd_conf() argument
79 if (pcie_valid_config(bus->number, PCI_SLOT(devfn)) == 0) { in pcie_rd_conf()
85 ret = orion_pcie_rd_conf(PCIE_BASE, bus, devfn, where, size, val); in pcie_rd_conf()
91 static int pcie_rd_conf_wa(struct pci_bus *bus, u32 devfn, in pcie_rd_conf_wa() argument
96 if (pcie_valid_config(bus->number, PCI_SLOT(devfn)) == 0) { in pcie_rd_conf_wa()
112 bus, devfn, where, size, val); in pcie_rd_conf_wa()
117 static int pcie_wr_conf(struct pci_bus *bus, u32 devfn, in pcie_wr_conf() argument
123 if (pcie_valid_config(bus->number, PCI_SLOT(devfn)) == 0) in pcie_wr_conf()
127 ret = orion_pcie_wr_conf(PCIE_BASE, bus, devfn, where, size, val); in pcie_wr_conf()
322 static int orion5x_pci_valid_config(int bus, u32 devfn) in orion5x_pci_valid_config() argument
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