| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | mmhub_v2_3.c | 490 uint32_t def, data, def1, data1; in mmhub_v2_3_update_medium_grain_clock_gating() local 493 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); in mmhub_v2_3_update_medium_grain_clock_gating() 516 if (def1 != data1) in mmhub_v2_3_update_medium_grain_clock_gating() 524 uint32_t def, data, def1, data1, def2, data2; in mmhub_v2_3_update_medium_grain_light_sleep() local 527 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_WR_CGTT_CLK_CTRL); in mmhub_v2_3_update_medium_grain_light_sleep() 558 if (def1 != data1) in mmhub_v2_3_update_medium_grain_light_sleep()
|
| H A D | mmhub_v2_0.c | 578 uint32_t def, data, def1, data1; in mmhub_v2_0_update_medium_grain_clock_gating() local 587 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_Sienna_Cichlid); in mmhub_v2_0_update_medium_grain_clock_gating() 591 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); in mmhub_v2_0_update_medium_grain_clock_gating() 620 if (def1 != data1) in mmhub_v2_0_update_medium_grain_clock_gating() 626 if (def1 != data1) in mmhub_v2_0_update_medium_grain_clock_gating()
|
| H A D | mmhub_v1_0.c | 501 uint32_t def, data, def1, data1, def2 = 0, data2 = 0; in mmhub_v1_0_update_medium_grain_clock_gating() local 506 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); in mmhub_v1_0_update_medium_grain_clock_gating() 509 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_RV); in mmhub_v1_0_update_medium_grain_clock_gating() 550 if (def1 != data1) { in mmhub_v1_0_update_medium_grain_clock_gating()
|
| H A D | mmhub_v4_1_0.c | 540 uint32_t def1, data1, def2 = 0, data2 = 0; in mmhub_v4_1_0_update_medium_grain_clock_gating() local 544 def1 = data1 = RREG32_SOC15(MMHUB, 0, regDAGB0_CNTL_MISC2); in mmhub_v4_1_0_update_medium_grain_clock_gating() 571 if (def1 != data1) in mmhub_v4_1_0_update_medium_grain_clock_gating()
|
| H A D | mmhub_v3_0.c | 543 uint32_t def1, data1, def2 = 0, data2 = 0; in mmhub_v3_0_update_medium_grain_clock_gating() 548 def1 = data1 = RREG32_SOC15(MMHUB, 0, regDAGB0_CNTL_MISC2); in mmhub_v3_0_update_medium_grain_clock_gating() 591 if (def1 != data1) in mmhub_v3_0_update_medium_grain_clock_gating()
|
| H A D | mmhub_v4_2_0.c | 831 uint32_t def1, data1, def2 = 0, data2 = 0; in mmhub_v4_2_0_update_medium_grain_clock_gating() local 833 def1 = data1 = RREG32_SOC15(MMHUB, GET_INST(MMHUB, 0), regDAGB0_CNTL_MISC2); in mmhub_v4_2_0_update_medium_grain_clock_gating() 854 if (def1 != data1) in mmhub_v4_2_0_update_medium_grain_clock_gating()
|
| /linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | iceland_smumgr.c | 1857 const uint16_t *def1, *def2; in iceland_populate_bapm_parameters_in_dpm_table() local 1890 def1 = defaults->bapmti_r; in iceland_populate_bapm_parameters_in_dpm_table() 1896 dpm_table->BAPMTI_R[i][j][k] = PP_HOST_TO_SMC_US(*def1); in iceland_populate_bapm_parameters_in_dpm_table() 1898 def1++; in iceland_populate_bapm_parameters_in_dpm_table()
|
| H A D | ci_smumgr.c | 722 const uint16_t *def1, *def2; in ci_populate_bapm_parameters_in_dpm_table() local 746 def1 = defaults->bapmti_r; in ci_populate_bapm_parameters_in_dpm_table() 752 dpm_table->BAPMTI_R[i][j][k] = PP_HOST_TO_SMC_US(*def1); in ci_populate_bapm_parameters_in_dpm_table() 754 def1++; in ci_populate_bapm_parameters_in_dpm_table()
|
| /linux/drivers/gpu/drm/radeon/ |
| H A D | ci_dpm.c | 410 const u16 *def1; in ci_populate_bapm_parameters_in_dpm_table() local 432 def1 = pt_defaults->bapmti_r; in ci_populate_bapm_parameters_in_dpm_table() 438 dpm_table->BAPMTI_R[i][j][k] = cpu_to_be16(*def1); in ci_populate_bapm_parameters_in_dpm_table() 440 def1++; in ci_populate_bapm_parameters_in_dpm_table()
|