Searched refs:dcore_offset (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/accel/habanalabs/common/ |
| H A D | security.c | 308 u32 dcore_offset, u32 num_instances, u32 instance_offset, in hl_init_pb_with_mask() argument
332 i * dcore_offset + j * instance_offset, in hl_init_pb_with_mask()
357 int hl_init_pb(struct hl_device *hdev, u32 num_dcores, u32 dcore_offset, in hl_init_pb() argument
362 return hl_init_pb_with_mask(hdev, num_dcores, dcore_offset, in hl_init_pb()
386 u32 dcore_offset, u32 num_instances, u32 instance_offset, in hl_init_pb_ranges_with_mask() argument
414 i * dcore_offset + j * instance_offset, in hl_init_pb_ranges_with_mask()
442 u32 dcore_offset, u32 num_instances, u32 instance_offset, in hl_init_pb_ranges() argument
447 return hl_init_pb_ranges_with_mask(hdev, num_dcores, dcore_offset, in hl_init_pb_ranges()
467 int hl_init_pb_single_dcore(struct hl_device *hdev, u32 dcore_offset, in hl_init_pb_single_dcore() argument
488 dcore_offset + i * instance_offset, in hl_init_pb_single_dcore()
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| /linux/drivers/accel/habanalabs/gaudi2/ |
| H A D | gaudi2.c | 7942 u32 dcore_offset = dcore_id * DCORE_OFFSET; in gaudi2_mmu_dcore_prepare() local
7949 WREG32(mmDCORE0_EDMA0_QM_AXUSER_NONSECURED_HB_MMU_BP + dcore_offset, 0); in gaudi2_mmu_dcore_prepare()
7950 WREG32(mmDCORE0_EDMA0_QM_AXUSER_NONSECURED_HB_ASID + dcore_offset, rw_asid); in gaudi2_mmu_dcore_prepare()
7951 WREG32(mmDCORE0_EDMA0_CORE_CTX_AXUSER_HB_MMU_BP + dcore_offset, 0); in gaudi2_mmu_dcore_prepare()
7952 WREG32(mmDCORE0_EDMA0_CORE_CTX_AXUSER_HB_ASID + dcore_offset, rw_asid); in gaudi2_mmu_dcore_prepare()
7956 WREG32(mmDCORE0_EDMA1_QM_AXUSER_NONSECURED_HB_MMU_BP + dcore_offset, 0); in gaudi2_mmu_dcore_prepare()
7957 WREG32(mmDCORE0_EDMA1_QM_AXUSER_NONSECURED_HB_ASID + dcore_offset, rw_asid); in gaudi2_mmu_dcore_prepare()
7958 WREG32(mmDCORE0_EDMA1_CORE_CTX_AXUSER_HB_ASID + dcore_offset, rw_asid); in gaudi2_mmu_dcore_prepare()
7959 WREG32(mmDCORE0_EDMA1_CORE_CTX_AXUSER_HB_MMU_BP + dcore_offset, 0); in gaudi2_mmu_dcore_prepare()
7963 WREG32(mmDCORE0_SYNC_MNGR_GLBL_ASID_NONE_SEC_PRIV + dcore_offset, asid); in gaudi2_mmu_dcore_prepare()
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