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Searched refs:dcn4x (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_dpmm/
H A Ddml2_dpmm_dcn4.c99 …in_out->programming->min_clocks.dcn4x.active.uclk_khz = dml_round_up(min_uclk_bw > min_uclk_latenc… in calculate_system_active_minimums()
100 …in_out->programming->min_clocks.dcn4x.active.fclk_khz = dml_round_up(min_fclk_bw > min_fclk_latenc… in calculate_system_active_minimums()
101 …in_out->programming->min_clocks.dcn4x.active.dcfclk_khz = dml_round_up(min_dcfclk_bw > min_dcfclk_… in calculate_system_active_minimums()
142 …in_out->programming->min_clocks.dcn4x.svp_prefetch.uclk_khz = dml_round_up(min_uclk_bw > min_uclk_… in calculate_svp_prefetch_minimums()
143 …in_out->programming->min_clocks.dcn4x.svp_prefetch.fclk_khz = dml_round_up(min_fclk_bw > min_fclk_… in calculate_svp_prefetch_minimums()
144 …in_out->programming->min_clocks.dcn4x.svp_prefetch.dcfclk_khz = dml_round_up(min_dcfclk_bw > min_d… in calculate_svp_prefetch_minimums()
175 …in_out->programming->min_clocks.dcn4x.svp_prefetch_no_throttle.uclk_khz = dml_round_up(min_uclk_bw… in calculate_svp_prefetch_minimums()
176 …in_out->programming->min_clocks.dcn4x.svp_prefetch_no_throttle.fclk_khz = dml_round_up(min_fclk_bw… in calculate_svp_prefetch_minimums()
177 …in_out->programming->min_clocks.dcn4x.svp_prefetch_no_throttle.dcfclk_khz = dml_round_up(min_dcfcl… in calculate_svp_prefetch_minimums()
200 …in_out->programming->min_clocks.dcn4x.idle.uclk_khz = dml_round_up(min_uclk_avg > min_uclk_latency… in calculate_idle_minimums()
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/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/
H A Ddml21_translation_helper.c837 …tx.bw.dcn.clk.dispclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.dispclk_khz; in dml21_copy_clocks_to_dc_state()
838 …context->bw_ctx.bw.dcn.clk.dcfclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x… in dml21_copy_clocks_to_dc_state()
839 …w.dcn.clk.dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.active.uclk_khz; in dml21_copy_clocks_to_dc_state()
840 …context->bw_ctx.bw.dcn.clk.fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.a… in dml21_copy_clocks_to_dc_state()
841 …cn.clk.idle_dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.idle.uclk_khz; in dml21_copy_clocks_to_dc_state()
842 …w.dcn.clk.idle_fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.idle.fclk_khz; in dml21_copy_clocks_to_dc_state()
843 …clk_deep_sleep_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.deepsleep_dcfclk_k… in dml21_copy_clocks_to_dc_state()
846 …context->bw_ctx.bw.dcn.clk.dtbclk_en = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.… in dml21_copy_clocks_to_dc_state()
847 ….dcn.clk.ref_dtbclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.dtbrefclk_khz; in dml21_copy_clocks_to_dc_state()
848 …context->bw_ctx.bw.dcn.clk.socclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x… in dml21_copy_clocks_to_dc_state()
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H A Ddml21_utils.c231 pipe_ctx->plane_res.bw.dppclk_khz = pln_prog->min_clocks.dcn4x.dppclk_khz; in dml21_program_dc_pipe()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c728 (unsigned int)pipe_ctx->global_sync.dcn4x.vready_offset_pixels, in dcn401_enable_stream_timing()
729 (unsigned int)pipe_ctx->global_sync.dcn4x.vstartup_lines, in dcn401_enable_stream_timing()
730 (unsigned int)pipe_ctx->global_sync.dcn4x.vupdate_offset_pixels, in dcn401_enable_stream_timing()
731 (unsigned int)pipe_ctx->global_sync.dcn4x.vupdate_vupdate_width_pixels, in dcn401_enable_stream_timing()
732 (unsigned int)pipe_ctx->global_sync.dcn4x.pstate_keepout_start_lines, in dcn401_enable_stream_timing()
2011 unsigned int vready_offset = pipe->global_sync.dcn4x.vready_offset_pixels; in dcn401_calculate_vready_offset_for_group()
2015 if (other_pipe->global_sync.dcn4x.vready_offset_pixels > vready_offset) in dcn401_calculate_vready_offset_for_group()
2016 vready_offset = other_pipe->global_sync.dcn4x.vready_offset_pixels; in dcn401_calculate_vready_offset_for_group()
2019 if (other_pipe->global_sync.dcn4x.vready_offset_pixels > vready_offset) in dcn401_calculate_vready_offset_for_group()
2020 vready_offset = other_pipe->global_sync.dcn4x.vready_offset_pixels; in dcn401_calculate_vready_offset_for_group()
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/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn4_calcs.c7291 struct dml2_dcn4x_soc_qos_params *dcn4x, in get_max_urgent_latency_us() argument
7297 …latency = dcn4x->per_uclk_dpm_params[min_clk_index].maximum_latency_when_urgent_uclk_cycles / uclk… in get_max_urgent_latency_us()
7298 * (1 + dcn4x->umc_max_latency_margin / 100.0) in get_max_urgent_latency_us()
7299 + dcn4x->mall_overhead_fclk_cycles / FabricClock in get_max_urgent_latency_us()
7300 + dcn4x->max_round_trip_to_furthest_cs_fclk_cycles / FabricClock in get_max_urgent_latency_us()
7301 * (1 + dcn4x->fabric_max_transport_latency_margin / 100.0); in get_max_urgent_latency_us()
7912 …y_us = get_max_urgent_latency_us(&mode_lib->soc.qos_parameters.qos_params.dcn4x, mode_lib->ms.uclk… in dml_core_ms_prefetch_check()
7913 …s->mSOCParameters.df_response_time_us = mode_lib->soc.qos_parameters.qos_params.dcn4x.df_qos_respo… in dml_core_ms_prefetch_check()
8003 …_lib->ms.uclk_freq_mhz * 1000.0), mode_lib->soc.qos_parameters.qos_params.dcn4x.per_uclk_dpm_param… in dml_core_mode_support()
9116 …mode_lib->soc.qos_parameters.qos_params.dcn4x.per_uclk_dpm_params[mode_lib->ms.qos_param_index].ur… in dml_core_mode_support()
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H A Ddml2_core_dcn4.c675 …in_clk_index = lookup_uclk_dpm_index_by_freq(in_out->programming->min_clocks.dcn4x.active.uclk_khz, in core_dcn4_mode_programming()